[sim] renamed sllv to sll (same for other shifts)
authorAndrew Waterman <waterman@s141.Millennium.Berkeley.EDU>
Mon, 13 Sep 2010 02:13:48 +0000 (19:13 -0700)
committerAndrew Waterman <waterman@s141.Millennium.Berkeley.EDU>
Mon, 13 Sep 2010 02:13:48 +0000 (19:13 -0700)
13 files changed:
riscv/execute.h
riscv/insns/sll.h [new file with mode: 0644]
riscv/insns/sllv.h [deleted file]
riscv/insns/sllvw.h [deleted file]
riscv/insns/sllw.h [new file with mode: 0644]
riscv/insns/sra.h [new file with mode: 0644]
riscv/insns/srav.h [deleted file]
riscv/insns/sravw.h [deleted file]
riscv/insns/sraw.h [new file with mode: 0644]
riscv/insns/srl.h [new file with mode: 0644]
riscv/insns/srlv.h [deleted file]
riscv/insns/srlvw.h [deleted file]
riscv/insns/srlw.h [new file with mode: 0644]

index f1374b5483453a2cdb5101591ebffd8d34795a63..2a168ea866959271f34a632b98eef40cab2eb2c2 100644 (file)
@@ -236,11 +236,6 @@ switch((insn.bits >> 0x19) & 0x7f)
           #include "insns/truncu_l_d.h"
           break;
         }
-        if((insn.bits & 0xfe007fe0) == 0xd0006040)
-        {
-          #include "insns/mul_d.h"
-          break;
-        }
         if((insn.bits & 0xfe007fe0) == 0xd0006020)
         {
           #include "insns/sub_d.h"
@@ -266,6 +261,11 @@ switch((insn.bits >> 0x19) & 0x7f)
           #include "insns/truncu_w_d.h"
           break;
         }
+        if((insn.bits & 0xfe007fe0) == 0xd0006040)
+        {
+          #include "insns/mul_d.h"
+          break;
+        }
         if((insn.bits & 0xfe007fe0) == 0xd0006840)
         {
           #include "insns/c_lt_d.h"
@@ -317,14 +317,14 @@ switch((insn.bits >> 0x19) & 0x7f)
     {
       case 0x0:
       {
-        if((insn.bits & 0xfe0fffe0) == 0xd4000800)
+        if((insn.bits & 0xfe0fffe0) == 0xd4000000)
         {
-          #include "insns/mtf_s.h"
+          #include "insns/mff_s.h"
           break;
         }
-        if((insn.bits & 0xfe0fffe0) == 0xd4000000)
+        if((insn.bits & 0xfe0fffe0) == 0xd4000800)
         {
-          #include "insns/mff_s.h"
+          #include "insns/mtf_s.h"
           break;
         }
         #include "insns/unimp.h"
@@ -371,14 +371,14 @@ switch((insn.bits >> 0x19) & 0x7f)
           #include "insns/nmadd_s.h"
           break;
         }
-        if((insn.bits & 0xfe007c00) == 0xd6000400)
+        if((insn.bits & 0xfe007c00) == 0xd6000c00)
         {
-          #include "insns/msub_s.h"
+          #include "insns/nmsub_s.h"
           break;
         }
-        if((insn.bits & 0xfe007c00) == 0xd6000c00)
+        if((insn.bits & 0xfe007c00) == 0xd6000400)
         {
-          #include "insns/nmsub_s.h"
+          #include "insns/msub_s.h"
           break;
         }
         if((insn.bits & 0xfe007c00) == 0xd6000000)
@@ -541,6 +541,11 @@ switch((insn.bits >> 0x19) & 0x7f)
           #include "insns/nor.h"
           break;
         }
+        if((insn.bits & 0xfe007fe0) == 0xea000060)
+        {
+          #include "insns/sltu.h"
+          break;
+        }
         if((insn.bits & 0xfe007fe0) == 0xea0000c0)
         {
           #include "insns/xor.h"
@@ -561,11 +566,6 @@ switch((insn.bits >> 0x19) & 0x7f)
           #include "insns/slt.h"
           break;
         }
-        if((insn.bits & 0xfe007fe0) == 0xea000060)
-        {
-          #include "insns/sltu.h"
-          break;
-        }
         if((insn.bits & 0xfe007fe0) == 0xea000080)
         {
           #include "insns/and.h"
@@ -614,19 +614,19 @@ switch((insn.bits >> 0x19) & 0x7f)
       }
       case 0x7:
       {
-        if((insn.bits & 0xfe007fe0) == 0xea007080)
+        if((insn.bits & 0xfe007fe0) == 0xea0070c0)
         {
-          #include "insns/srlv.h"
+          #include "insns/sra.h"
           break;
         }
-        if((insn.bits & 0xfe007fe0) == 0xea0070c0)
+        if((insn.bits & 0xfe007fe0) == 0xea007080)
         {
-          #include "insns/srav.h"
+          #include "insns/srl.h"
           break;
         }
         if((insn.bits & 0xfe007fe0) == 0xea007040)
         {
-          #include "insns/sllv.h"
+          #include "insns/sll.h"
           break;
         }
         #include "insns/unimp.h"
@@ -732,19 +732,19 @@ switch((insn.bits >> 0x19) & 0x7f)
       }
       case 0x7:
       {
-        if((insn.bits & 0xfe007fe0) == 0xee0070c0)
+        if((insn.bits & 0xfe007fe0) == 0xee007080)
         {
-          #include "insns/sravw.h"
+          #include "insns/srlw.h"
           break;
         }
-        if((insn.bits & 0xfe007fe0) == 0xee007040)
+        if((insn.bits & 0xfe007fe0) == 0xee0070c0)
         {
-          #include "insns/sllvw.h"
+          #include "insns/sraw.h"
           break;
         }
-        if((insn.bits & 0xfe007fe0) == 0xee007080)
+        if((insn.bits & 0xfe007fe0) == 0xee007040)
         {
-          #include "insns/srlvw.h"
+          #include "insns/sllw.h"
           break;
         }
         #include "insns/unimp.h"
diff --git a/riscv/insns/sll.h b/riscv/insns/sll.h
new file mode 100644 (file)
index 0000000..7e81e6b
--- /dev/null
@@ -0,0 +1,2 @@
+require64;
+RC = RB << (RA & 0x3F);
diff --git a/riscv/insns/sllv.h b/riscv/insns/sllv.h
deleted file mode 100644 (file)
index 7e81e6b..0000000
+++ /dev/null
@@ -1,2 +0,0 @@
-require64;
-RC = RB << (RA & 0x3F);
diff --git a/riscv/insns/sllvw.h b/riscv/insns/sllvw.h
deleted file mode 100644 (file)
index f694a2f..0000000
+++ /dev/null
@@ -1 +0,0 @@
-RC = sext32(RB << (RA & 0x1F));
diff --git a/riscv/insns/sllw.h b/riscv/insns/sllw.h
new file mode 100644 (file)
index 0000000..f694a2f
--- /dev/null
@@ -0,0 +1 @@
+RC = sext32(RB << (RA & 0x1F));
diff --git a/riscv/insns/sra.h b/riscv/insns/sra.h
new file mode 100644 (file)
index 0000000..e01fcd5
--- /dev/null
@@ -0,0 +1,2 @@
+require64;
+RC = sreg_t(RB) >> (RA & 0x3F);
diff --git a/riscv/insns/srav.h b/riscv/insns/srav.h
deleted file mode 100644 (file)
index e01fcd5..0000000
+++ /dev/null
@@ -1,2 +0,0 @@
-require64;
-RC = sreg_t(RB) >> (RA & 0x3F);
diff --git a/riscv/insns/sravw.h b/riscv/insns/sravw.h
deleted file mode 100644 (file)
index 8e9aa88..0000000
+++ /dev/null
@@ -1 +0,0 @@
-RC = sext32(sreg_t(RB) >> (RA & 0x1F));
diff --git a/riscv/insns/sraw.h b/riscv/insns/sraw.h
new file mode 100644 (file)
index 0000000..8e9aa88
--- /dev/null
@@ -0,0 +1 @@
+RC = sext32(sreg_t(RB) >> (RA & 0x1F));
diff --git a/riscv/insns/srl.h b/riscv/insns/srl.h
new file mode 100644 (file)
index 0000000..ec6fee8
--- /dev/null
@@ -0,0 +1,2 @@
+require64;
+RC = RB >> (RA & 0x3F);
diff --git a/riscv/insns/srlv.h b/riscv/insns/srlv.h
deleted file mode 100644 (file)
index ec6fee8..0000000
+++ /dev/null
@@ -1,2 +0,0 @@
-require64;
-RC = RB >> (RA & 0x3F);
diff --git a/riscv/insns/srlvw.h b/riscv/insns/srlvw.h
deleted file mode 100644 (file)
index c523b59..0000000
+++ /dev/null
@@ -1 +0,0 @@
-RC = sext32((uint32_t)RB >> (RA & 0x1F));
diff --git a/riscv/insns/srlw.h b/riscv/insns/srlw.h
new file mode 100644 (file)
index 0000000..c523b59
--- /dev/null
@@ -0,0 +1 @@
+RC = sext32((uint32_t)RB >> (RA & 0x1F));