Comment changes.
bfd/
* coff-h8300.c: Spell fall through comments consistently.
* coffgen.c: Likewise.
* elf32-hppa.c: Likewise.
* elf32-ppc.c: Likewise.
* elf32-score.c: Likewise.
* elf32-score7.c: Likewise.
* elf64-ppc.c: Likewise.
* elfxx-aarch64.c: Likewise.
* elfxx-mips.c: Likewise.
* cpu-ns32k.c: Add missing fall through comments.
* elf-m10300.c: Likewise.
* elf32-arm.c: Likewise.
* elf32-avr.c: Likewise.
* elf32-bfin.c: Likewise.
* elf32-frv.c: Likewise.
* elf32-i386.c: Likewise.
* elf32-microblaze.c: Likewise.
* elf32-nds32.c: Likewise.
* elf32-ppc.c: Likewise.
* elf32-rl78.c: Likewise.
* elf32-rx.c: Likewise.
* elf32-s390.c: Likewise.
* elf32-sh.c: Likewise.
* elf32-tic6x.c: Likewise.
* elf64-ia64-vms.c: Likewise.
* elf64-ppc.c: Likewise.
* elf64-s390.c: Likewise.
* elf64-x86-64.c: Likewise.
* elflink.c: Likewise.
* elfnn-aarch64.c: Likewise.
* elfnn-ia64.c: Likewise.
* ieee.c: Likewise.
* oasys.c: Likewise.
* pdp11.c: Likewise.
* srec.c: Likewise.
* versados.c: Likewise.
opcodes/
* aarch64-opc.c: Spell fall through comments consistently.
* i386-dis.c: Likewise.
* aarch64-dis.c: Add missing fall through comments.
* aarch64-opc.c: Likewise.
* arc-dis.c: Likewise.
* arm-dis.c: Likewise.
* i386-dis.c: Likewise.
* m68k-dis.c: Likewise.
* mep-asm.c: Likewise.
* ns32k-dis.c: Likewise.
* sh-dis.c: Likewise.
* tic4x-dis.c: Likewise.
* tic6x-dis.c: Likewise.
* vax-dis.c: Likewise.
binutils/
* dlltool.c: Spell fall through comments consistently.
* objcopy.c: Likewise.
* readelf.c: Likewise.
* dwarf.c: Add missing fall through comments.
* elfcomm.c: Likewise.
* sysinfo.y: Likewise.
* readelf.c: Likewise. Also remove extraneous comments.
gas/
* app.c: Add missing fall through comments.
* dw2gencfi.c: Likewise.
* expr.c: Likewise.
* config/tc-alpha.c: Likewise.
* config/tc-arc.c: Likewise.
* config/tc-arm.c: Likewise.
* config/tc-cr16.c: Likewise.
* config/tc-crx.c: Likewise.
* config/tc-dlx.c: Likewise.
* config/tc-h8300.c: Likewise.
* config/tc-hppa.c: Likewise.
* config/tc-i370.c: Likewise.
* config/tc-i386.c: Likewise.
* config/tc-i960.c: Likewise.
* config/tc-ia64.c: Likewise.
* config/tc-m68hc11.c: Likewise.
* config/tc-m68k.c: Likewise.
* config/tc-mep.c: Likewise.
* config/tc-metag.c: Likewise.
* config/tc-microblaze.c: Likewise.
* config/tc-mips.c: Likewise.
* config/tc-ns32k.c: Likewise.
* config/tc-rx.c: Likewise.
* config/tc-score.c: Likewise.
* config/tc-score7.c: Likewise.
* config/tc-sh.c: Likewise.
* config/tc-tic4x.c: Likewise.
* config/tc-vax.c: Likewise.
* config/tc-xstormy16.c: Likewise.
* config/tc-z80.c: Likewise.
* config/tc-z8k.c: Likewise.
* config/obj-elf.c: Likewise.
* config/tc-i386.c: Likewise.
* depend.c: Spell fall through comments consistently.
* config/tc-arm.c: Likewise.
* config/tc-d10v.c: Likewise.
* config/tc-i960.c: Likewise.
* config/tc-ia64.c: Likewise.
* config/tc-m68k.c: Likewise.
* config/tc-mcore.c: Likewise.
* config/tc-mep.c: Likewise.
* config/tc-ns32k.c: Likewise.
* config/tc-visium.c: Likewise.
* config/tc-xstormy16.c: Likewise.
* config/tc-z8k.c: Likewise.
gprof/
* gprof.c: Add missing fall through comments.
ld/
* lexsup.c: Spell fall through comments consistently and add
missing fall through comments.
+2016-10-06 Alan Modra <amodra@gmail.com>
+
+ * coff-h8300.c: Spell fall through comments consistently.
+ * coffgen.c: Likewise.
+ * elf32-hppa.c: Likewise.
+ * elf32-ppc.c: Likewise.
+ * elf32-score.c: Likewise.
+ * elf32-score7.c: Likewise.
+ * elf64-ppc.c: Likewise.
+ * elfxx-aarch64.c: Likewise.
+ * elfxx-mips.c: Likewise.
+ * cpu-ns32k.c: Add missing fall through comments.
+ * elf-m10300.c: Likewise.
+ * elf32-arm.c: Likewise.
+ * elf32-avr.c: Likewise.
+ * elf32-bfin.c: Likewise.
+ * elf32-frv.c: Likewise.
+ * elf32-i386.c: Likewise.
+ * elf32-microblaze.c: Likewise.
+ * elf32-nds32.c: Likewise.
+ * elf32-ppc.c: Likewise.
+ * elf32-rl78.c: Likewise.
+ * elf32-rx.c: Likewise.
+ * elf32-s390.c: Likewise.
+ * elf32-sh.c: Likewise.
+ * elf32-tic6x.c: Likewise.
+ * elf64-ia64-vms.c: Likewise.
+ * elf64-ppc.c: Likewise.
+ * elf64-s390.c: Likewise.
+ * elf64-x86-64.c: Likewise.
+ * elflink.c: Likewise.
+ * elfnn-aarch64.c: Likewise.
+ * elfnn-ia64.c: Likewise.
+ * ieee.c: Likewise.
+ * oasys.c: Likewise.
+ * pdp11.c: Likewise.
+ * srec.c: Likewise.
+ * versados.c: Likewise.
+
2016-10-06 Alan Modra <amodra@gmail.com>
* coffcode.h (coff_slurp_symbol_table): Revert accidental commit
/* Done with this reloc. */
break;
}
-
- /* FALLTHROUGH and try to turn the 24-/32-bit reloc into a 16-bit
- reloc. */
+ /* Fall through. */
/* This is a 24-/32-bit absolute address in a mov insn, which can
become an 16-bit absolute address if it's in the right range. */
auxp->u.auxent.x_scn.x_comdat);
break;
}
- /* Otherwise fall through. */
+ /* Fall through. */
case C_EXT:
case C_AIX_WEAKEXT:
if (ISFCN (combined->u.syment.n_type))
llnos, next);
break;
}
- /* Otherwise fall through. */
+ /* Fall through. */
default:
fprintf (file, "AUX lnno %d size 0x%x tagndx %ld",
auxp->u.auxent.x_sym.x_misc.x_lnsz.x_lnno,
case 4:
value = (value << 8) | (*buffer++ & 0xff);
value = (value << 8) | (*buffer++ & 0xff);
+ /* Fall through. */
case 2:
value = (value << 8) | (*buffer++ & 0xff);
+ /* Fall through. */
case 1:
value = (value << 8) | (*buffer++ & 0xff);
break;
case 4:
*buffer-- = (value & 0xff); value >>= 8;
*buffer-- = (value & 0xff); value >>= 8;
+ /* Fall through. */
case 2:
*buffer-- = (value & 0xff); value >>= 8;
+ /* Fall through. */
case 1:
*buffer-- = (value & 0xff); value >>= 8;
}
&& h != NULL
&& ! SYMBOL_REFERENCES_LOCAL (info, h))
return bfd_reloc_dangerous;
+ /* Fall through. */
case R_MN10300_GOT32:
/* Issue 2052223:
Taking the address of a protected function in a shared library
case R_ARM_ABS12:
if (!globals->vxworks_p)
return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
+ /* Fall through. */
case R_ARM_PC24:
case R_ARM_ABS32:
}
}
}
+ /* Fall through. */
default:
{
case R_BFIN_BYTE4_DATA:
if (! IS_FDPIC (output_bfd))
goto non_fdpic;
+ /* Fall through. */
case R_BFIN_GOT17M4:
case R_BFIN_GOTHI:
case R_FRV_32:
if (! IS_FDPIC (output_bfd))
goto non_fdpic;
+ /* Fall through. */
case R_FRV_GOT12:
case R_FRV_GOTHI:
}
plabel = 1;
}
- /* Fall through and possibly emit a dynamic relocation. */
+ /* Fall through. */
case R_PARISC_DIR17F:
case R_PARISC_DIR17R:
case R_386_GOTOFF:
eh->gotoff_ref = 1;
+ /* Fall through. */
case R_386_32:
case R_386_PC32:
case R_386_PLT32:
goto dogot;
case (int) R_MICROBLAZE_TLSLD:
tls_type = (TLS_TLS | TLS_LD);
+ /* Fall through. */
dogot:
case (int) R_MICROBLAZE_GOT_64:
{
goto dogottls;
case R_MICROBLAZE_TLSLD:
tls_type |= (TLS_TLS | TLS_LD);
+ /* Fall through. */
dogottls:
sec->has_tls_reloc = 1;
+ /* Fall through. */
case R_MICROBLAZE_GOT_64:
if (htab->sgot == NULL)
{
success = 1;
break;
}
+ /* Fall through. */
case (N32_OP6_MEM << 8) | N32_MEM_LH:
case (N32_OP6_MEM << 8) | N32_MEM_SH:
case (N32_OP6_MEM << 8) | N32_MEM_LHS:
success = 1;
break;
}
+ /* Fall through. */
case (N32_OP6_MEM << 8) | N32_MEM_LW:
case (N32_OP6_MEM << 8) | N32_MEM_SW:
/* The range is +/-64k. */
success = 1;
break;
}
+ /* Fall through. */
default:
break;
}
tls_type = TLS_TLS | TLS_DTPREL;
dogottls:
sec->has_tls_reloc = 1;
- /* Fall thru */
+ /* Fall through. */
/* GOT16 relocations */
case R_PPC_GOT16:
case R_PPC_SDAREL16:
htab->sdata[0].sym->ref_regular = 1;
- /* Fall thru */
+ /* Fall through. */
case R_PPC_VLE_SDAREL_LO16A:
case R_PPC_VLE_SDAREL_LO16D:
case R_PPC_REL32:
if (h == NULL || h == htab->elf.hgot)
break;
- /* Fall thru */
+ /* Fall through. */
case R_PPC_ADDR32:
case R_PPC_ADDR24:
case R_PPC_UADDR16:
if (bfd_link_pic (info))
break;
+ /* Fall through. */
case R_PPC_PLT32:
case R_PPC_PLTREL24:
case R_PPC_GOT_TLSLD16:
case R_PPC_GOT_TLSLD16_LO:
expecting_tls_get_addr = 1;
- /* Fall thru */
+ /* Fall through. */
case R_PPC_GOT_TLSLD16_HI:
case R_PPC_GOT_TLSLD16_HA:
case R_PPC_GOT_TLSGD16:
case R_PPC_GOT_TLSGD16_LO:
expecting_tls_get_addr = 1;
- /* Fall thru */
+ /* Fall through. */
case R_PPC_GOT_TLSGD16_HI:
case R_PPC_GOT_TLSGD16_HA:
case R_PPC_ADDR14_BRTAKEN:
case R_PPC_REL14_BRTAKEN:
branch_bit = BRANCH_PREDICT_BIT;
- /* Fall thru */
+ /* Fall through. */
/* Branch not taken prediction relocations. */
case R_PPC_ADDR14_BRNTAKEN:
+ htab->plt->output_offset
+ ent->plt.offset);
}
- /* Fall thru */
+ /* Fall through. */
case R_PPC_RELAX:
{
alone (it will be set to zero elsewhere in the link). */
if (sec == NULL)
break;
- /* Fall thru */
+ /* Fall through. */
case R_PPC_PLT16_HA:
case R_PPC_GOT16_HA:
default:
reloc_computes_value:
symval = rl78_compute_complex_reloc (r_type, symval, input_section);
+ /* Fall through. */
case R_RL78_DIR32:
case R_RL78_DIR24S:
case R_RL78_DIR16:
case R_RX_RH_8_NEG:
WARN_REDHAT ("RX_RH_8_NEG");
relocation = - relocation;
+ /* Fall through. */
case R_RX_DIR8S_PCREL:
UNSAFE_FOR_PID;
RANGE (-128, 127);
case R_RX_RH_16_NEG:
WARN_REDHAT ("RX_RH_16_NEG");
relocation = - relocation;
+ /* Fall through. */
case R_RX_DIR16S_PCREL:
UNSAFE_FOR_PID;
RANGE (-32768, 32767);
UNSAFE_FOR_PID;
WARN_REDHAT ("RX_RH_24_NEG");
relocation = - relocation;
+ /* Fall through. */
case R_RX_DIR24S_PCREL:
RANGE (-0x800000, 0x7fffff);
#if RX_OPCODE_BIG_ENDIAN
case R_RX_ABS8S:
UNSAFE_FOR_PID;
+ /* Fall through. */
case R_RX_ABS8S_PCREL:
RX_STACK_POP (relocation);
RANGE (-128, 127);
case R_390_GOTOFF32:
if (h == NULL || !s390_is_ifunc_symbol_p (h) || !h->def_regular)
break;
+ /* Fall through. */
case R_390_PLT12DBL:
case R_390_PLT16DBL:
+ h ->plt.offset);
goto do_relocation;
}
+ /* Fall through. */
case R_390_8:
case R_390_16:
default:
msg = _("internal error: unknown error");
- /* fall through */
+ /* Fall through. */
common_error:
(*info->callbacks->warning) (info, msg, name, input_bfd,
}
/* In case if we don't have global got symbols we default
to setting DT_SCORE_GOTSYM to the same value as
- DT_SCORE_SYMTABNO, so we just fall through. */
+ DT_SCORE_SYMTABNO. */
+ /* Fall through. */
case DT_SCORE_SYMTABNO:
name = ".dynsym";
default:
msg = _("internal error: unknown error");
- /* fall through */
+ /* Fall through. */
common_error:
(*info->callbacks->warning) (info, msg, name, input_bfd,
}
/* In case if we don't have global got symbols we default
to setting DT_SCORE_GOTSYM to the same value as
- DT_SCORE_SYMTABNO, so we just fall through. */
+ DT_SCORE_SYMTABNO. */
+ /* Fall through. */
case DT_SCORE_SYMTABNO:
name = ".dynsym";
/* This may require an rofixup. */
if (!htab->fdpic_p)
break;
+ /* Fall through. */
case R_SH_GOTPLT32:
case R_SH_GOT32:
case R_SH_GOT20:
goto done_reloc;
}
}
+ /* Fall through. */
case R_C6000_PCR_S12:
case R_C6000_PCR_S10:
rel->r_offset, input_section->size);
break;
}
+ /* Fall through. */
default:
(*info->callbacks->reloc_overflow) (info,
&h->root,
tls_type = TLS_TLS | TLS_DTPREL;
dogottls:
sec->has_tls_reloc = 1;
- /* Fall thru */
+ /* Fall through */
case R_PPC64_GOT16:
case R_PPC64_GOT16_DS:
case R_PPC64_TOC16_DS:
htab->do_multi_toc = 1;
ppc64_elf_tdata (abfd)->has_small_toc_reloc = 1;
+ /* Fall through. */
case R_PPC64_TOC16_LO:
case R_PPC64_TOC16_HI:
case R_PPC64_TOC16_HA:
case R_PPC64_GOT_TLSLD16_LO:
expecting_tls_get_addr = 1;
found_tls_get_addr_arg = 1;
- /* Fall thru */
+ /* Fall through. */
case R_PPC64_GOT_TLSLD16_HI:
case R_PPC64_GOT_TLSLD16_HA:
case R_PPC64_GOT_TLSGD16_LO:
expecting_tls_get_addr = 1;
found_tls_get_addr_arg = 1;
- /* Fall thru */
+ /* Fall through. */
case R_PPC64_GOT_TLSGD16_HI:
case R_PPC64_GOT_TLSGD16_HA:
case R_PPC64_TLSGD:
case R_PPC64_TLSLD:
found_tls_get_addr_arg = 1;
- /* Fall thru */
+ /* Fall through. */
case R_PPC64_TLS:
case R_PPC64_TOC16:
}
if ((opc & (0x3f << 2)) == (58u << 2))
break;
- /* Fall thru */
+ /* Fall through. */
default:
/* Wrong sort of reloc, or not a ld. We may
case R_PPC64_ADDR14_BRTAKEN:
case R_PPC64_REL14_BRTAKEN:
insn = 0x01 << 21; /* 'y' or 't' bit, lowest bit of BO field. */
- /* Fall thru. */
+ /* Fall through. */
/* Branch not taken prediction relocations. */
case R_PPC64_ADDR14_BRNTAKEN:
case R_PPC64_REL14_BRNTAKEN:
insn |= bfd_get_32 (output_bfd,
contents + rel->r_offset) & ~(0x01 << 21);
- /* Fall thru. */
+ /* Fall through. */
case R_PPC64_REL14:
max_br_offset = 1 << 15;
- /* Fall thru. */
+ /* Fall through. */
case R_PPC64_REL24:
/* Calls to functions with a different TOC, such as calls to
case R_PPC64_DTPREL64:
if (htab->elf.tls_sec != NULL)
addend -= htab->elf.tls_sec->vma + DTP_OFFSET;
- /* Fall thru */
+ /* Fall through. */
/* Relocations that may need to be propagated if this is a
dynamic object. */
alone (it will be set to zero elsewhere in the link). */
if (sec == NULL)
break;
- /* Fall thru */
+ /* Fall through. */
case R_PPC64_GOT16_HA:
case R_PPC64_PLTGOT16_HA:
case R_390_GOTOFF64:
if (h == NULL || !s390_is_ifunc_symbol_p (h) || !h->def_regular)
break;
+ /* Fall through. */
case R_390_PLT12DBL:
case R_390_PLT16DBL:
+ h->plt.offset);
goto do_relocation;
}
+ /* Fall through. */
case R_390_8:
case R_390_16:
goto error_return;
}
}
+ /* Fall through. */
case R_X86_64_32S:
case R_X86_64_PC64:
case R_X86_64_32:
if (!ABI_64_P (abfd))
goto pointer;
+ /* Fall through. */
case R_X86_64_8:
case R_X86_64_16:
case R_X86_64_32S:
case 'S':
symbol_is_section = TRUE;
+ /* Fall through. */
case 's':
++sym;
symlen = strtol (sym, (char **) symp, 10);
bfd_set_error (bfd_error_bad_value);
return FALSE;
}
+ /* Fall through. */
case BFD_RELOC_AARCH64_16:
#if ARCH_SIZE == 64
bfd_set_error (bfd_error_bad_value);
return FALSE;
}
+ /* Fall through. */
case BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL:
case BFD_RELOC_AARCH64_ADR_HI21_PCREL:
rel->r_offset, input_section->size);
break;
}
+ /* Fall through. */
default:
(*info->callbacks->reloc_overflow) (info,
&h->root,
/* Force use of MOVZ. */
contents = reencode_movzn_to_movz (contents);
}
- /* fall through */
+ /* Fall through. */
/* Group relocations to create a 16, 32, 48 or 64 bit unsigned
data or abs address inline. */
}
/* In case if we don't have global got symbols we default
to setting DT_MIPS_GOTSYM to the same value as
- DT_MIPS_SYMTABNO, so we just fall through. */
+ DT_MIPS_SYMTABNO. */
+ /* Fall through. */
case DT_MIPS_SYMTABNO:
name = ".dynsym";
{
case 4:
OUT (value >> 24);
+ /* Fall through. */
case 3:
OUT (value >> 16);
+ /* Fall through. */
case 2:
OUT (value >> 8);
+ /* Fall through. */
case 1:
OUT (value);
}
case 0x84:
ch = THIS ();
NEXT ();
+ /* Fall through. */
case 0x83:
ch = THIS ();
NEXT ();
+ /* Fall through. */
case 0x82:
ch = THIS ();
NEXT ();
+ /* Fall through. */
case 0x81:
ch = THIS ();
NEXT ();
+ /* Fall through. */
case 0x80:
break;
}
ch = THIS ();
NEXT ();
OUT (ch);
+ /* Fall through. */
case 0x83:
ch = THIS ();
NEXT ();
OUT (ch);
+ /* Fall through. */
case 0x82:
ch = THIS ();
NEXT ();
OUT (ch);
+ /* Fall through. */
case 0x81:
ch = THIS ();
NEXT ();
OUT (ch);
+ /* Fall through. */
case 0x80:
break;
}
case 0x84:
OUT (THIS ());
NEXT ();
+ /* Fall through. */
case 0x83:
OUT (THIS ());
NEXT ();
+ /* Fall through. */
case 0x82:
OUT (THIS ());
NEXT ();
+ /* Fall through. */
case 0x81:
OUT (THIS ());
NEXT ();
break;
case oasys_record_is_data_enum:
oasys->first_data_record = bfd_tell (abfd) - record.header.length;
+ /* Fall through. */
case oasys_record_is_debug_enum:
case oasys_record_is_module_enum:
case oasys_record_is_named_section_enum:
case bfd_link_hash_undefweak:
type = N_WEAKU;
val = 0;
+ /* Fall through. */
case bfd_link_hash_indirect:
case bfd_link_hash_warning:
/* FIXME: Ignore these for now. The circumstances under which
case 7:
TOHEX (dst, (address >> 24), check_sum);
dst += 2;
+ /* Fall through. */
case 8:
case 2:
TOHEX (dst, (address >> 16), check_sum);
dst += 2;
+ /* Fall through. */
case 9:
case 1:
case 0:
break;
case ESD_XDEF_IN_ABS:
sec = bfd_abs_section_ptr;
+ /* Fall through. */
case ESD_XDEF_IN_SEC:
{
int snum = VDATA (abfd)->def_idx++;
+2016-10-06 Alan Modra <amodra@gmail.com>
+
+ * dlltool.c: Spell fall through comments consistently.
+ * objcopy.c: Likewise.
+ * readelf.c: Likewise.
+ * dwarf.c: Add missing fall through comments.
+ * elfcomm.c: Likewise.
+ * sysinfo.y: Likewise.
+ * readelf.c: Likewise. Also remove extraneous comments.
+
2016-10-06 Alan Modra <amodra@gmail.com>
* cxxfilt.c (usage): Add ATTRIBUTE_NORETURN.
sec->orelocation = rpp;
break;
}
- /* else fall through */
+ /* Fall through. */
+
case IDATA4:
/* An idata$4 or idata$5 is one word long, and has an
rva to idata$6. */
{
case DW_AT_frame_base:
have_frame_base = 1;
+ /* Fall through. */
case DW_AT_location:
case DW_AT_string_length:
case DW_AT_return_addr:
case DW_AT_frame_base:
have_frame_base = 1;
+ /* Fall through. */
case DW_AT_location:
case DW_AT_string_length:
case DW_AT_return_addr:
case 'F':
do_debug_frames_interp = 1;
+ /* Fall through. */
case 'f':
do_debug_frames = 1;
break;
| (((unsigned long) (field[1])) << 8)
| (((unsigned long) (field[2])) << 16)
| (((unsigned long) (field[3])) << 24);
+ /* Fall through. */
case 6:
if (sizeof (elf_vma) == 8)
| (((unsigned long) (field[1])) << 8)
| (((unsigned long) (field[2])) << 16)
| (((unsigned long) (field[3])) << 24);
+ /* Fall through. */
case 7:
if (sizeof (elf_vma) == 8)
| (((unsigned long) (field[1])) << 8)
| (((unsigned long) (field[2])) << 16)
| (((unsigned long) (field[3])) << 24);
+ /* Fall through. */
case 8:
if (sizeof (elf_vma) == 8)
| (((unsigned long) (field[1])) << 8)
| (((unsigned long) (field[2])) << 16)
| (((unsigned long) (field[3])) << 24);
+ /* Fall through. */
default:
error (_("Unhandled data length: %d\n"), size);
| (((unsigned long) (field[1])) << 16)
| (((unsigned long) (field[0])) << 24);
}
+ /* Fall through. */
case 6:
if (sizeof (elf_vma) == 8)
| (((unsigned long) (field[1])) << 16)
| (((unsigned long) (field[0])) << 24);
}
+ /* Fall through. */
case 7:
if (sizeof (elf_vma) == 8)
| (((unsigned long) (field[1])) << 16)
| (((unsigned long) (field[0])) << 24);
}
+ /* Fall through. */
case 8:
if (sizeof (elf_vma) == 8)
| (((unsigned long) (field[1])) << 16)
| (((unsigned long) (field[0])) << 24);
}
+ /* Fall through. */
default:
error (_("Unhandled data length: %d\n"), size);
{
case OPTION_CHANGE_SECTION_ADDRESS:
p->vma_val = val;
- /* Drop through. */
+ /* Fall through. */
case OPTION_CHANGE_SECTION_LMA:
p->lma_val = val;
{
case FULL_HEX:
nc = printf ("0x");
- /* Drop through. */
+ /* Fall through. */
case LONG_HEX:
#ifdef BFD64
case DEC_5:
if (vma <= 99999)
return printf ("%5" BFD_VMA_FMT "d", vma);
- /* Drop through. */
+ /* Fall through. */
case PREFIX_HEX:
nc = printf ("0x");
- /* Drop through. */
+ /* Fall through. */
case HEX:
return nc + printf ("%" BFD_VMA_FMT "x", vma);
rtype = elf_msp430x_reloc_type (type);
break;
}
+ /* Fall through. */
case EM_MSP430_OLD:
rtype = elf_msp430_reloc_type (type);
break;
default:
/* xgettext:c-format */
error (_("Invalid option '-%c'\n"), c);
- /* Drop through. */
+ /* Fall through. */
case '?':
usage (stderr);
}
case DT_SYMENT :
case DT_RELENT :
dynamic_info[entry->d_tag] = entry->d_un.d_val;
+ /* Fall through. */
case DT_PLTPADSZ:
case DT_MOVEENT :
case DT_MOVESZ :
case 10: /* R_MSP430_SYM_DIFF */
if (uses_msp430x_relocs ())
break;
+ /* Fall through. */
case 21: /* R_MSP430X_SYM_DIFF */
saved_sym = symtab + get_reloc_symindex (reloc->r_info);
return TRUE;
case EM_MSP430:
if (uses_msp430x_relocs ())
return reloc_type == 2; /* R_MSP430_ABS16. */
+ /* Fall through. */
case EM_MSP430_OLD:
return reloc_type == 5; /* R_MSP430_16_BYTE. */
case EM_NDS32:
goto do_numlist;
case 3:
printf (_("Symbol Attributes:"));
+ /* Fall through. */
do_numlist:
for (;;)
{
/* Determine how to read the rest of the header. */
switch (elf_header.e_ident[EI_DATA])
{
- default: /* fall through */
- case ELFDATANONE: /* fall through */
+ default:
+ case ELFDATANONE:
case ELFDATA2LSB:
byte_get = byte_get_little_endian;
byte_put = byte_put_little_endian;
break;
case 'g':
printf("\tchecksum(ffile,raw, idx, IT_%s_CODE);\n", it);
-
+ /* Fall through. */
case 'i':
-
case 'o':
case 'c':
printf("}\n");
printf("\tprintf(\"repeat %%d\\n\", %s);\n",$3);
if (rdepth==2)
printf("\tprintf(\"repeat %%d\\n\", %s[n]);\n",$3);
+ /* Fall through. */
case 'i':
case 'g':
case 'o':
+2016-10-06 Alan Modra <amodra@gmail.com>
+
+ * app.c: Add missing fall through comments.
+ * dw2gencfi.c: Likewise.
+ * expr.c: Likewise.
+ * config/tc-alpha.c: Likewise.
+ * config/tc-arc.c: Likewise.
+ * config/tc-arm.c: Likewise.
+ * config/tc-cr16.c: Likewise.
+ * config/tc-crx.c: Likewise.
+ * config/tc-dlx.c: Likewise.
+ * config/tc-h8300.c: Likewise.
+ * config/tc-hppa.c: Likewise.
+ * config/tc-i370.c: Likewise.
+ * config/tc-i386.c: Likewise.
+ * config/tc-i960.c: Likewise.
+ * config/tc-ia64.c: Likewise.
+ * config/tc-m68hc11.c: Likewise.
+ * config/tc-m68k.c: Likewise.
+ * config/tc-mep.c: Likewise.
+ * config/tc-metag.c: Likewise.
+ * config/tc-microblaze.c: Likewise.
+ * config/tc-mips.c: Likewise.
+ * config/tc-ns32k.c: Likewise.
+ * config/tc-rx.c: Likewise.
+ * config/tc-score.c: Likewise.
+ * config/tc-score7.c: Likewise.
+ * config/tc-sh.c: Likewise.
+ * config/tc-tic4x.c: Likewise.
+ * config/tc-vax.c: Likewise.
+ * config/tc-xstormy16.c: Likewise.
+ * config/tc-z80.c: Likewise.
+ * config/tc-z8k.c: Likewise.
+ * config/obj-elf.c: Likewise.
+ * config/tc-i386.c: Likewise.
+ * depend.c: Spell fall through comments consistently.
+ * config/tc-arm.c: Likewise.
+ * config/tc-d10v.c: Likewise.
+ * config/tc-i960.c: Likewise.
+ * config/tc-ia64.c: Likewise.
+ * config/tc-m68k.c: Likewise.
+ * config/tc-mcore.c: Likewise.
+ * config/tc-mep.c: Likewise.
+ * config/tc-ns32k.c: Likewise.
+ * config/tc-visium.c: Likewise.
+ * config/tc-xstormy16.c: Likewise.
+ * config/tc-z8k.c: Likewise.
+
2016-10-06 Alan Modra <amodra@gmail.com>
* as.h (as_assert): Add ATTRIBUTE_NORETURN.
state = 9;
break;
}
+ /* Fall through. */
case 17:
/* We have seen "af" at the start of a symbol,
a ' here is a part of that symbol. */
}
break;
}
+ /* Fall through. */
default:
{
const char *bad_msg = _("unrecognized .section attribute:"
/* ... then fall through to plain expression. */
input_line_pointer = hold;
}
+ /* Fall through. */
default:
if (saw_arg && !saw_comma)
case 'G':
/* vax_md_atof() doesn't like "G" for some reason. */
type = 'g';
+ /* Fall through. */
case 'F':
case 'D':
return vax_md_atof (type, litP, sizeP);
if (tok[tokidx].X_op != O_constant)
goto de_fault;
}
- /* Fall-through */
+ /* Fall through. */
case O_constant:
/* Check the range. */
if (operand->bits != 32
goto match_failed;
break;
}
+ /* Fall through. */
default:
de_fault:
if (operand->default_reloc == 0)
case O_tlsie:
if (!(operand->flags & ARC_OPERAND_LIMM))
goto match_failed;
+ /* Fall through. */
case O_absent:
if (!generic_reloc_p (operand->default_reloc))
goto match_failed;
case BFD_RELOC_ARC_TLS_LE_32:
gas_assert (!fixP->fx_addsy);
gas_assert (!fixP->fx_subsy);
+ /* Fall through. */
case BFD_RELOC_ARC_GOTOFF:
case BFD_RELOC_ARC_32_ME:
case BFD_RELOC_ARC_S21W_PCREL_PLT:
reloc = BFD_RELOC_ARC_S21W_PCREL;
+ /* Fall through. */
case BFD_RELOC_ARC_S25W_PCREL:
case BFD_RELOC_ARC_S21W_PCREL:
image = insert_operand (image, operand, regs, NULL, 0);
break;
}
+ /* Fall through. */
default:
/* This operand needs a relocation. */
if (*ccp != start && processor <= 15)
return processor;
}
+ /* Fall through. */
case REG_TYPE_MMXWC:
/* WC includes WCG. ??? I'm not sure this is true for all
case OT_odd_infix_unc:
if (!unified_syntax)
return 0;
- /* else fall through */
+ /* Fall through. */
case OT_csuffix:
case OT_csuffixF:
case BFD_RELOC_ARM_OFFSET_IMM:
if (!fixP->fx_done && seg->use_rela_p)
value = 0;
+ /* Fall through. */
case BFD_RELOC_ARM_LITERAL:
sign = value > 0;
newval = md_chars_to_number (buf, INSN_SIZE);
fixP->fx_done = 0;
}
+ /* Fall through. */
case BFD_RELOC_ARM_PLT32:
#endif
code = BFD_RELOC_8_PCREL;
break;
}
+ /* Fall through. */
case BFD_RELOC_16:
if (fixp->fx_pcrel)
code = BFD_RELOC_16_PCREL;
break;
}
+ /* Fall through. */
case BFD_RELOC_32:
if (fixp->fx_pcrel)
code = BFD_RELOC_32_PCREL;
break;
}
+ /* Fall through. */
case BFD_RELOC_ARM_MOVW:
if (fixp->fx_pcrel)
code = BFD_RELOC_ARM_MOVW_PCREL;
break;
}
+ /* Fall through. */
case BFD_RELOC_ARM_MOVT:
if (fixp->fx_pcrel)
code = BFD_RELOC_ARM_MOVT_PCREL;
break;
}
+ /* Fall through. */
case BFD_RELOC_ARM_THUMB_MOVW:
if (fixp->fx_pcrel)
code = BFD_RELOC_ARM_THUMB_MOVW_PCREL;
break;
}
+ /* Fall through. */
case BFD_RELOC_ARM_THUMB_MOVT:
if (fixp->fx_pcrel)
code = BFD_RELOC_ARM_THUMB_MOVT_PCREL;
break;
}
+ /* Fall through. */
case BFD_RELOC_NONE:
case BFD_RELOC_ARM_PCREL_BRANCH:
{
case arg_ic: /* Case $0x18. */
operandS++;
+ /* Fall through. */
case arg_c: /* Case 0x18. */
/* Set constant. */
process_label_constant (operandS, cr16_ins);
*operandE = '\0';
process_label_constant (operandS, cr16_ins);
operandS = operandE;
+ /* Fall through. */
case arg_rbase: /* Case (r1) or (r1,r0). */
operandS++;
/* Set register base. */
break;
case 21:
- if ((nbits == 21) && (IS_INSN_TYPE (LD_STOR_INS))) nbits = 20;
+ if ((nbits == 21) && (IS_INSN_TYPE (LD_STOR_INS)))
+ nbits = 20;
+ /* Fall through. */
case 24:
case 22:
case 20:
case arg_sc: /* Case *+0x18. */
case arg_ic: /* Case $0x18. */
operandS++;
+ /* Fall through. */
case arg_c: /* Case 0x18. */
/* Set constant. */
process_label_constant (operandS, crx_ins);
*operandE = '\0';
process_label_constant (operandS, crx_ins);
operandS = operandE;
+ /* Fall through. */
case arg_rbase: /* Case (r1). */
operandS++;
/* Set register base. */
CRX_PRINT (0, getreg_image (arg->r), 12);
CRX_PRINT (0, getreg_image (arg->i_r), 8);
CRX_PRINT (0, arg->scale, 6);
+ /* Fall through. */
case arg_ic:
case arg_c:
print_constant (nbits, shift, arg);
if ( segf && segf->sym != fixP->fx_addsy)
value = 0;
}
- /* Drop through. */
+ /* Fall through. */
case BFD_RELOC_D10V_18:
/* Instruction addresses are always right-shifted by 2. */
value >>= AT_WORD_RIGHT_SHIFT;
reg_shift = 21;
goto general_reg;
}
+ /* Fall through. */
/* The immediate 16 bits literal, bit 0-15. */
case 'i':
break;
default:
as_bad (_("Can't work out size of operand.\n"));
+ /* Fall through. */
case L_16:
case L_16U:
size = 2;
{
case SGL:
opcode |= 0x20;
+ /* Fall through. */
case DBL:
the_insn.fpof1 = flag;
continue;
break;
case 'E': /* 32-bit */
type = 'f';
+ /* Fall through. */
case 'D': /* 64-bit */
md_atof (type, tmp, &nbytes);
p = frag_more (nbytes);
case 3:
if (x->array[2])
return 0;
+ /* Fall through. */
case 2:
if (x->array[1])
return 0;
+ /* Fall through. */
case 1:
return !x->array[0];
default:
{
case 3:
x->array[2] = v;
+ /* Fall through. */
case 2:
x->array[1] = v;
+ /* Fall through. */
case 1:
x->array[0] = v;
+ /* Fall through. */
break;
default:
abort ();
case 3:
if (x->array[2] != y->array[2])
return 0;
+ /* Fall through. */
case 2:
if (x->array[1] != y->array[1])
return 0;
+ /* Fall through. */
case 1:
return x->array[0] == y->array[0];
break;
case 3:
if (x->array[2])
return 0;
+ /* Fall through. */
case 2:
if (x->array[1])
return 0;
+ /* Fall through. */
case 1:
return !x->array[0];
default:
case 3:
if (x->array[2] != y->array[2])
return 0;
+ /* Fall through. */
case 2:
if (x->array[1] != y->array[1])
return 0;
+ /* Fall through. */
case 1:
return x->array[0] == y->array[0];
break;
{
case 3:
x.array [2] &= y.array [2];
+ /* Fall through. */
case 2:
x.array [1] &= y.array [1];
+ /* Fall through. */
case 1:
x.array [0] &= y.array [0];
break;
{
case 3:
x.array [2] |= y.array [2];
+ /* Fall through. */
case 2:
x.array [1] |= y.array [1];
+ /* Fall through. */
case 1:
x.array [0] |= y.array [0];
break;
{
case 3:
x.array [2] &= ~y.array [2];
+ /* Fall through. */
case 2:
x.array [1] &= ~y.array [1];
+ /* Fall through. */
case 1:
x.array [0] &= ~y.array [0];
break;
{
case 3:
x.array [2] &= y.array [2];
+ /* Fall through. */
case 2:
x.array [1] &= y.array [1];
+ /* Fall through. */
case 1:
x.array [0] &= y.array [0];
break;
{
case 3:
x.array [2] |= y.array [2];
+ /* Fall through. */
case 2:
x.array [1] |= y.array [1];
+ /* Fall through. */
case 1:
x.array [0] |= y.array [0];
break;
{
case 3:
x.array [2] ^= y.array [2];
+ /* Fall through. */
case 2:
x.array [1] ^= y.array [1];
+ /* Fall through. */
case 1:
x.array [0] ^= y.array [0];
break;
if (intel_syntax && (intel_float_operand (mnemonic) & 2))
i.suffix = SHORT_MNEM_SUFFIX;
else
+ /* Fall through. */
case BYTE_MNEM_SUFFIX:
case QWORD_MNEM_SUFFIX:
i.suffix = mnem_p[-1];
case 5:
case 4:
swap_2_operands (1, i.operands - 2);
+ /* Fall through. */
case 3:
case 2:
swap_2_operands (0, i.operands - 1);
else if (t->opcode_modifier.d)
goto check_reverse;
}
+ /* Fall through. */
case 3:
/* If we swap operand in encoding, we match the next one. */
if (i.swap_operand && t->opcode_modifier.s)
continue;
+ /* Fall through. */
case 4:
case 5:
overlap1 = operand_type_and (i.types[1], operand_types[1]);
case 5:
overlap4 = operand_type_and (i.types[4],
operand_types[4]);
+ /* Fall through. */
case 4:
overlap3 = operand_type_and (i.types[3],
operand_types[3]);
+ /* Fall through. */
case 3:
overlap2 = operand_type_and (i.types[2],
operand_types[2]);
i.types[4],
operand_types[4]))
continue;
+ /* Fall through. */
case 4:
if (!operand_type_match (overlap3, i.types[3])
|| (check_register
i.types[3],
operand_types[3])))
continue;
+ /* Fall through. */
case 3:
/* Here we make use of the fact that there are no
reverse match 3 operand instructions, and all 3
i.suffix = QWORD_MNEM_SUFFIX;
break;
}
+ /* Fall through. */
case CODE_32BIT:
if (!i.tm.opcode_modifier.no_lsuf)
i.suffix = LONG_MNEM_SUFFIX;
{
case 2:
*p++ = i.tm.base_opcode >> 8;
+ /* Fall through. */
case 1:
*p++ = i.tm.base_opcode;
break;
return NULL;
}
#endif
+ /* Fall through. */
case BFD_RELOC_X86_64_PLT32:
case BFD_RELOC_X86_64_GOT32:
code = fixp->fx_r_type;
break;
}
+ /* Fall through. */
default:
if (fixp->fx_pcrel)
{
case I_BIT:
/* Treat missing displacement as displacement of 0. */
mode |= D_BIT;
- /* Fall into next case. */
+ /* Fall through. */
case D_BIT | A_BIT | I_BIT:
case D_BIT | I_BIT:
/* Set MEMB bit in mode, and OR in mode bits. */
mem_fmt (args, oP, 1);
break;
}
+ /* Fall through. */
case MEM2:
case MEM4:
case MEM8:
as_fatal (_("Only constant offsets are supported"));
break;
}
+ /* Fall through. */
case rs_fill:
s_index += 3 * (first_frag->fr_offset >> 4);
break;
/* SOR must be an integer multiple of 8 */
if (e->X_op == O_constant && e->X_add_number & 0x7)
return OPERAND_OUT_OF_RANGE;
+ /* Fall through. */
case IA64_OPND_SOF:
case IA64_OPND_SOL:
if (e->X_op == O_constant)
case IA64_OPND_IMM14:
case IA64_OPND_IMM22:
relocatable = 1;
+ /* Fall through. */
case IA64_OPND_IMM1:
case IA64_OPND_IMM8:
case IA64_OPND_IMM8U4:
++CURR_SLOT.num_fixups;
return OPERAND_MATCH;
}
+ /* Fall through. */
case IA64_OPND_TAG13:
case IA64_OPND_TAG13b:
switch (e->X_op)
{
specs[count++] = tmpl;
}
+ /* Fall through. */
case AR_RSC:
if (!rsrc_write &&
(regno == AR_BSPSTORE
case IA64_DVS_SPECIFIC:
if (md.debug_dv)
fprintf (stderr, "Implementation-specific, assume worst case...\n");
- /* ...fall through... */
+ /* Fall through. */
case IA64_DVS_INSTR:
if (md.debug_dv)
fprintf (stderr, "Inserting instr serialization\n");
default:
as_bad (_("Invalid accumulator register."));
+ /* Fall through. */
case REG_D:
byte = 0xE6;
TAB (ABSTOPCREL, SZ_UNDEF));
break;
}
- /* Fall through into long. */
+ /* Fall through. */
case SIZE_LONG:
if (isvar (&opP->disp))
add_fix ('l', &opP->disp, 0, 0);
break;
case '3':
tmpreg &= 0xFF;
+ /* Fall through. */
case '8':
case 'C':
case 'j':
as_bad (_("M340 specific opcode used when assembling for M210"));
break;
}
- /* drop through... */
+ /* Fall through. */
case O2:
op_end = parse_reg (op_end + 1, & reg);
inst |= reg;
operand = MEP_OPERAND_PCREL17A2;
break;
}
- /* ...FALLTHROUGH... */
+ /* Fall through. */
case MEP_INSN_JMP:
addend = target_address_for (fragP);
case MEP_INSN_BNEZ:
bit = 1;
+ /* Fall through. */
case MEP_INSN_BEQZ:
fragP->fr_opcode[1^e] = bit | (addend & 0xfe);
operand = MEP_OPERAND_PCREL8A2;
case MEP_INSN_BNEI:
bit = 4;
+ /* Fall through. */
case MEP_INSN_BEQI:
if (subtype_mappings[fragP->fr_subtype].growth)
{
insn->bits |= (1 << 7);
break;
}
+ /* Fall through. */
default:
as_bad (_("invalid quickrot register specified"));
return NULL;
case BFD_RELOC_MICROBLAZE_64_TLSGD:
case BFD_RELOC_MICROBLAZE_64_TLSLD:
S_SET_THREAD_LOCAL (fixP->fx_addsy);
+ /* Fall through. */
case BFD_RELOC_MICROBLAZE_64_GOTPC:
case BFD_RELOC_MICROBLAZE_64_GOT:
{
case M_DABS:
dbl = 1;
+ /* Fall through. */
case M_ABS:
/* bgez $a0,1f
move v0,$a0
case M_BGEL:
likely = 1;
+ /* Fall through. */
case M_BGE:
if (op[1] == 0)
macro_build_branch_rs (likely ? M_BGEZL : M_BGEZ, &offset_expr, op[0]);
case M_BGTL_I:
likely = 1;
+ /* Fall through. */
case M_BGT_I:
/* Check for > max integer. */
if (imm_expr.X_add_number >= GPR_SMAX)
case M_BGEUL:
likely = 1;
+ /* Fall through. */
case M_BGEU:
if (op[1] == 0)
goto do_true;
case M_BGTUL_I:
likely = 1;
+ /* Fall through. */
case M_BGTU_I:
if (op[0] == 0
|| (GPR_SIZE == 32
case M_BGTL:
likely = 1;
+ /* Fall through. */
case M_BGT:
if (op[1] == 0)
macro_build_branch_rs (likely ? M_BGTZL : M_BGTZ, &offset_expr, op[0]);
case M_BGTUL:
likely = 1;
+ /* Fall through. */
case M_BGTU:
if (op[1] == 0)
macro_build_branch_rsrt (likely ? M_BNEL : M_BNE,
case M_BLEL:
likely = 1;
+ /* Fall through. */
case M_BLE:
if (op[1] == 0)
macro_build_branch_rs (likely ? M_BLEZL : M_BLEZ, &offset_expr, op[0]);
case M_BLEL_I:
likely = 1;
+ /* Fall through. */
case M_BLE_I:
if (imm_expr.X_add_number >= GPR_SMAX)
goto do_true;
case M_BLEUL:
likely = 1;
+ /* Fall through. */
case M_BLEU:
if (op[1] == 0)
macro_build_branch_rsrt (likely ? M_BEQL : M_BEQ,
case M_BLEUL_I:
likely = 1;
+ /* Fall through. */
case M_BLEU_I:
if (op[0] == 0
|| (GPR_SIZE == 32
case M_BLTL:
likely = 1;
+ /* Fall through. */
case M_BLT:
if (op[1] == 0)
macro_build_branch_rs (likely ? M_BLTZL : M_BLTZ, &offset_expr, op[0]);
case M_BLTUL:
likely = 1;
+ /* Fall through. */
case M_BLTU:
if (op[1] == 0)
goto do_false;
case M_DDIV_3:
dbl = 1;
+ /* Fall through. */
case M_DIV_3:
s = "mflo";
goto do_div3;
case M_DREM_3:
dbl = 1;
+ /* Fall through. */
case M_REM_3:
s = "mfhi";
do_div3:
case M_DLCA_AB:
dbl = 1;
+ /* Fall through. */
case M_LCA_AB:
call = 1;
goto do_la;
case M_DLA_AB:
dbl = 1;
+ /* Fall through. */
case M_LA_AB:
do_la:
/* Load the address of a symbol into a register. If breg is not
case M_DMUL:
dbl = 1;
+ /* Fall through. */
case M_MUL:
if (mips_opts.arch == CPU_R5900)
macro_build (NULL, dbl ? "dmultu" : "multu", "d,s,t", op[0], op[1],
case M_DMUL_I:
dbl = 1;
+ /* Fall through. */
case M_MUL_I:
/* The MIPS assembler some times generates shifts and adds. I'm
not trying to be that fancy. GCC should do this for us
case M_DMULO_I:
dbl = 1;
+ /* Fall through. */
case M_MULO_I:
imm = 1;
goto do_mulo;
case M_DMULO:
dbl = 1;
+ /* Fall through. */
case M_MULO:
do_mulo:
start_noreorder ();
case M_DMULOU_I:
dbl = 1;
+ /* Fall through. */
case M_MULOU_I:
imm = 1;
goto do_mulou;
case M_DMULOU:
dbl = 1;
+ /* Fall through. */
case M_MULOU:
do_mulou:
start_noreorder ();
case M_DDIV_3:
dbl = 1;
+ /* Fall through. */
case M_DIV_3:
s = "mflo";
goto do_div3;
case M_DREM_3:
dbl = 1;
+ /* Fall through. */
case M_REM_3:
s = "mfhi";
do_div3:
case M_DMUL:
dbl = 1;
+ /* Fall through. */
case M_MUL:
macro_build (NULL, dbl ? "dmultu" : "multu", "x,y", op[1], op[2]);
macro_build (NULL, "mflo", "x", op[0]);
addrmodeP->disp[0] = str + 2;
return -1;
}
+ /* Fall through. */
default:
as_bad (_("Invalid syntax in PC-relative addressing mode"));
return 0;
{
case 'f':
addrmodeP->float_flag = 1;
- /* Drop through. */
+ /* Fall through. */
case 'r':
if (str[1] >= '0' && str[1] < '8')
{
str[strl - 4] = 0;
return -1; /* reg rel */
}
- /* Drop through. */
+ /* Fall through. */
default:
if (!strncmp (&str[strl - 4], "(fp", 3))
case 'f': /* Operand of sfsr turns out to be a nasty
specialcase. */
opcode_bit_ptr -= 5;
+ /* Fall through. */
case 'Z': /* Float not immediate. */
case 'F': /* 32 bit float general form. */
case 'L': /* 64 bit float. */
case BFD_RELOC_RX_GPRELL:
val >>= 1;
+ /* Fall through. */
case BFD_RELOC_RX_GPRELW:
val >>= 1;
+ /* Fall through. */
case BFD_RELOC_RX_GPRELB:
#if RX_OPCODE_BIG_ENDIAN
op[1] = val & 0xff;
code = BFD_RELOC_32_PCREL;
break;
}
+ /* Fall through. */
case BFD_RELOC_HI16_S:
case BFD_RELOC_LO16:
case BFD_RELOC_SCORE_JMP:
code = BFD_RELOC_32_PCREL;
break;
}
+ /* Fall through. */
case BFD_RELOC_HI16_S:
case BFD_RELOC_LO16:
case BFD_RELOC_SCORE_JMP:
break;
case IMM0_3s:
nbuf[indx] |= 0x08;
+ /* Fall through. */
case IMM0_3c:
insert (output + low_byte, BFD_RELOC_SH_IMM3, 0, operand);
break;
case IMM0_3Us:
nbuf[indx] |= 0x80;
+ /* Fall through. */
case IMM0_3Uc:
insert (output + low_byte, BFD_RELOC_SH_IMM3U, 0, operand);
break;
{
case BFD_RELOC_32:
buf[3] = val >> 24;
+ /* Fall through. */
case BFD_RELOC_24:
case BFD_RELOC_24_PCREL:
buf[2] = val >> 16;
+ /* Fall through. */
case BFD_RELOC_16:
case BFD_RELOC_16_PCREL:
case BFD_RELOC_LO16:
case 'b':
as_warn (_("Option -b is depreciated, please use -mbig"));
+ /* Fall through. */
case OPTION_BIG: /* big model */
tic4x_big_model = 1;
break;
case 'p':
as_warn (_("Option -p is depreciated, please use -mmemparm"));
+ /* Fall through. */
case OPTION_MEMPARM: /* push args */
tic4x_reg_args = 0;
break;
case 'r':
as_warn (_("Option -r is depreciated, please use -mregparm"));
+ /* Fall through. */
case OPTION_REGPARM: /* register args */
tic4x_reg_args = 1;
break;
case 's':
as_warn (_("Option -s is depreciated, please use -msmall"));
+ /* Fall through. */
case OPTION_SMALL: /* small model */
tic4x_big_model = 0;
break;
{
case 'l':
mode += 2;
+ /* Fall through. */
case 'w':
mode += 2;
+ /* Fall through. */
case ' ': /* Assumed B^ until our caller changes it. */
case 'b':
break;
return;
}
this_dest = r1;
-
- /* fall through... */
+ /* Fall through. */
case mode_i:
/* MOVIL/WRTL traditionally get an implicit "%l" applied
case XSTORMY16_OPERAND_REL8_4:
fixP->fx_addnumber -= 2;
+ /* Fall through. */
case XSTORMY16_OPERAND_REL8_2:
fixP->fx_addnumber -= 2;
fixP->fx_pcrel = 1;
case XSTORMY16_OPERAND_REL12:
fixP->fx_where += 2;
- /* Fall through... */
+ /* Fall through. */
case XSTORMY16_OPERAND_REL12A:
fixP->fx_addnumber -= 2;
fixP->fx_pcrel = 1;
*p++ = buf[2];
break;
}
+ /* Fall through. */
case '"':
for (quote = *p++; quote != *p && '\n' != *p; ++p)
/* No escapes. */ ;
}
check_mach (INS_UNPORT);
}
+ /* Fall through. */
case O_register:
emit_mx (prefix, opcode, 0, & arg_m);
break;
*q = opcode + ((reg - 'b') << 3);
break;
}
+ /* Fall through. */
default:
ill_op ();
}
*ptr++ = n >> 24;
*ptr++ = n >> 20;
*ptr++ = n >> 16;
+ /* Fall through. */
case 4: /* 4 nibbles == 16 bits. */
*ptr++ = n >> 12;
*ptr++ = n >> 8;
+ /* Fall through. */
case 2:
*ptr++ = n >> 4;
+ /* Fall through. */
case 1:
*ptr++ = n >> 0;
break;
/*case ARG_IMMNMINUS1: not used. */
case ARG_IMM4M1:
imm_operand->X_add_number--;
- /* Drop through. */
+ /* Fall through. */
case ARG_IMM4:
if (imm_operand->X_add_number > 15)
as_bad (_("immediate value out of range"));
break;
case ARG_NIM8:
imm_operand->X_add_number = -imm_operand->X_add_number;
- /* Drop through. */
+ /* Fall through. */
case ARG_IMM8:
output_ptr = apply_fix (output_ptr, BFD_RELOC_8, imm_operand, 2);
break;
if (file)
putc (c, file);
i++;
- /* Fall through. This can mishandle things like "$(" but
- there's no easy fix. */
+ /* Fall through. */
+ /* This can mishandle things like "$(" but there's no easy fix. */
default:
ordinary_char:
/* This can mishandle characters in the string "\0\n%*?[\\~";
case O_constant:
if ((encoding & 0x70) != DW_EH_PE_pcrel)
break;
+ /* Fall through. */
default:
encoding = DW_EH_PE_omit;
break;
/* '~' is permitted to start a label on the Delta. */
if (is_name_beginner (c))
goto isname;
+ /* Fall through. */
case '!':
case '-':
case '+':
+2016-10-06 Alan Modra <amodra@gmail.com>
+
+ * gprof.c: Add missing fall through comments.
+
2016-09-26 Vlad Zakharov <vzakhar@synopsys.com>
* Makefile.in: Regenerate.
break;
case 'E':
sym_id_add (optarg, EXCL_TIME);
+ /* Fall through. */
case 'e':
sym_id_add (optarg, EXCL_GRAPH);
break;
case 'F':
sym_id_add (optarg, INCL_TIME);
+ /* Fall through. */
case 'f':
sym_id_add (optarg, INCL_GRAPH);
break;
+2016-10-06 Alan Modra <amodra@gmail.com>
+
+ * lexsup.c: Spell fall through comments consistently and add
+ missing fall through comments.
+
2016-10-06 Alan Modra <amodra@gmail.com>
* plugin.c (asymbol_from_plugin_symbol): Avoid compiler warning
break;
case OPTION_TASK_LINK:
link_info.task_link = TRUE;
- /* Fall through - do an implied -r option. */
+ /* Fall through. */
case OPTION_UR:
if (bfd_link_pic (&link_info))
einfo (_("%P%F: -r and %s may not be used together\n"),
break;
case dynamic_list_data:
link_info.dynamic_data = TRUE;
+ /* Fall through. */
case dynamic_list:
link_info.dynamic = TRUE;
break;
+2016-10-06 Alan Modra <amodra@gmail.com>
+
+ * aarch64-opc.c: Spell fall through comments consistently.
+ * i386-dis.c: Likewise.
+ * aarch64-dis.c: Add missing fall through comments.
+ * aarch64-opc.c: Likewise.
+ * arc-dis.c: Likewise.
+ * arm-dis.c: Likewise.
+ * i386-dis.c: Likewise.
+ * m68k-dis.c: Likewise.
+ * mep-asm.c: Likewise.
+ * ns32k-dis.c: Likewise.
+ * sh-dis.c: Likewise.
+ * tic4x-dis.c: Likewise.
+ * tic6x-dis.c: Likewise.
+ * vax-dis.c: Likewise.
+
2016-10-06 Alan Modra <amodra@gmail.com>
* arc-ext.c (create_map): Add missing break.
switch (simd_size)
{
case 2: imm = (imm << 2) | imm;
+ /* Fall through. */
case 4: imm = (imm << 4) | imm;
+ /* Fall through. */
case 8: imm = (imm << 8) | imm;
+ /* Fall through. */
case 16: imm = (imm << 16) | imm;
+ /* Fall through. */
case 32: imm = (imm << 32) | imm;
+ /* Fall through. */
case 64: break;
default: assert (0); return 0;
}
switch (log_e)
{
case 1: imm = (imm << 2) | imm;
+ /* Fall through. */
case 2: imm = (imm << 4) | imm;
+ /* Fall through. */
case 3: imm = (imm << 8) | imm;
+ /* Fall through. */
case 4: imm = (imm << 16) | imm;
+ /* Fall through. */
case 5: imm = (imm << 32) | imm;
+ /* Fall through. */
case 6: break;
default: abort ();
}
{
case OP_MOV_IMM_WIDEN:
imm = ~imm;
- /* Fall through... */
+ /* Fall through. */
case OP_MOV_IMM_WIDE:
if (!aarch64_wide_constant_p (imm, esize == 4, NULL))
{
if (minor_opcode < 4)
return 2;
}
+ /* Fall through. */
case bfd_mach_arc_arc600:
return (major_opcode > 0xb) ? 2 : 4;
break;
case 'S':
allow_unpredictable = TRUE;
+ /* Fall through. */
case 's':
if ((given & 0x004f0000) == 0x004f0000)
{
oappend ("QWORD PTR ");
break;
}
+ /* Fall through. */
case stack_v_mode:
if (address_mode == mode_64bit && ((sizeflag & DFLAG) || (rex & REX_W)))
{
oappend ("QWORD PTR ");
break;
}
- /* FALLTHRU */
+ /* Fall through. */
case v_mode:
case v_swap_mode:
case dq_mode:
names = names64;
break;
}
+ /* Fall through. */
case stack_v_mode:
if (address_mode == mode_64bit && ((sizeflag & DFLAG) || (rex & REX_W)))
{
break;
}
bytemode = v_mode;
- /* FALLTHRU */
+ /* Fall through. */
case v_mode:
case v_swap_mode:
case dq_mode:
shift = vex.w ? 3 : 2;
break;
}
- /* Fall through if vex.b == 0. */
+ /* Fall through. */
case xmmqd_mode:
case xmmdw_mode:
case ymmq_mode:
if (base != 5)
/* No displacement. */
break;
+ /* Fall through. */
case 2:
/* 4 byte displacement. */
bytes_before_imm += 4;
if (modrm.rm != 6)
/* No displacement. */
break;
+ /* Fall through. */
case 2:
/* 2 byte displacement. */
bytes_before_imm += 2;
case 'X':
place = '8';
+ /* Fall through. */
case 'Y':
case 'Z':
case 'W':
break;
case '(':
depth++;
+ /* Fall through. */
default:
args[narg].len++;
break;
case 'f':
/* A "gen" operand but 5 bits from the end of instruction. */
ioffset -= 5;
+ /* Fall through. */
case 'Z':
case 'F':
case 'L':
fprintf_fn (stream, "xd%d", rn & ~1);
break;
}
+ /* Fall through. */
case D_REG_N:
fprintf_fn (stream, "dr%d", rn);
break;
fprintf_fn (stream, "xd%d", rm & ~1);
break;
}
+ /* Fall through. */
case D_REG_M:
fprintf_fn (stream, "dr%d", rm);
break;
return 0;
break;
}
+ /* Fall through. */
case 'J': /* Indirect (short) 8--15. */
if (! tic4x_print_indirect (info, INDIRECT_SHORT,
case tic6x_coding_mem_offset_minus_one_noscale:
case tic6x_coding_mem_offset_minus_one:
fld_val += 1;
+ /* Fall through. */
case tic6x_coding_mem_offset_noscale:
case tic6x_coding_mem_offset:
mem_offset = fld_val;
break;
case 0xB0: /* Displacement byte deferred: *displ(Rn). */
(*info->fprintf_func) (info->stream, "*");
+ /* Fall through. */
case 0xA0: /* Displacement byte: displ(Rn). */
if (reg == 0xF)
(*info->print_address_func) (addr + 2 + NEXTBYTE (p), info);
break;
case 0xD0: /* Displacement word deferred: *displ(Rn). */
(*info->fprintf_func) (info->stream, "*");
+ /* Fall through. */
case 0xC0: /* Displacement word: displ(Rn). */
if (reg == 0xF)
(*info->print_address_func) (addr + 3 + NEXTWORD (p), info);
break;
case 0xF0: /* Displacement long deferred: *displ(Rn). */
(*info->fprintf_func) (info->stream, "*");
+ /* Fall through. */
case 0xE0: /* Displacement long: displ(Rn). */
if (reg == 0xF)
(*info->print_address_func) (addr + 5 + NEXTLONG (p), info);
projects / binutils-gdb.git / commitdiff