{
HOST_WIDE_INT bytes =
(mode == BLKmode) ? int_size_in_bytes (type) : (int) GET_MODE_SIZE (mode);
- int words
- = (bytes + (bit_offset % 64) / 8 + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
+ int words = CEIL (bytes + (bit_offset % 64) / 8, UNITS_PER_WORD);
/* Variable sized entities are always passed/returned in memory. */
if (bytes < 0)
bytes = int_size_in_bytes (type);
else
bytes = GET_MODE_SIZE (mode);
- words = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
+ words = CEIL (bytes, UNITS_PER_WORD);
if (type)
mode = type_natural_mode (type, NULL, false);
bytes = int_size_in_bytes (type);
else
bytes = GET_MODE_SIZE (mode);
- words = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
+ words = CEIL (bytes, UNITS_PER_WORD);
/* To simplify the code below, represent vector types with a vector mode
even if MMX/SSE are not active. */
if (indirect_p)
type = build_pointer_type (type);
size = int_size_in_bytes (type);
- rsize = (size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
+ rsize = CEIL (size, UNITS_PER_WORD);
nat_mode = type_natural_mode (type, NULL, false);
switch (nat_mode)
else if (mode == XCmode)
return (TARGET_64BIT ? 4 : 6);
else
- return ((GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD);
+ return CEIL (GET_MODE_SIZE (mode), UNITS_PER_WORD);
}
else
{
cost = ix86_cost->int_load[2];
else
cost = ix86_cost->int_store[2];
- return (cost * (((int) GET_MODE_SIZE (mode)
- + UNITS_PER_WORD - 1) / UNITS_PER_WORD));
+ return cost * CEIL ((int) GET_MODE_SIZE (mode), UNITS_PER_WORD);
}
}
/* Return the cost of moving between two registers of mode MODE,
assuming that the move will be in pieces of at most UNITS bytes. */
- return COSTS_N_INSNS ((GET_MODE_SIZE (mode) + units - 1) / units);
+ return COSTS_N_INSNS (CEIL (GET_MODE_SIZE (mode), units));
}
/* Compute a (partial) cost for rtx X. Return true if the complete
#endif
#else
#define ADJUST_FIELD_ALIGN(FIELD, COMPUTED) \
- x86_field_alignment (FIELD, COMPUTED)
+ x86_field_alignment ((FIELD), (COMPUTED))
#endif
/* If defined, a C expression to compute the alignment given to a
If this macro is not defined, then (ALIGN) will be used. */
#define MINIMUM_ALIGNMENT(EXP, MODE, ALIGN) \
- ix86_minimum_alignment (EXP, MODE, ALIGN)
+ ix86_minimum_alignment ((EXP), (MODE), (ALIGN))
/* Set this nonzero if move instructions will actually fail to work
? (COMPLEX_MODE_P (MODE) ? 2 : 1) \
: ((MODE) == XFmode \
? (TARGET_64BIT ? 2 : 3) \
- : (MODE) == XCmode \
- ? (TARGET_64BIT ? 4 : 6) \
- : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)))
+ : ((MODE) == XCmode \
+ ? (TARGET_64BIT ? 4 : 6) \
+ : CEIL (GET_MODE_SIZE (MODE), UNITS_PER_WORD))))
#define HARD_REGNO_NREGS_HAS_PADDING(REGNO, MODE) \
((TARGET_128BIT_LONG_DOUBLE && !TARGET_64BIT) \
If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
for any hard reg, then this must be 0 for correct output. */
-#define MODES_TIEABLE_P(MODE1, MODE2) ix86_modes_tieable_p (MODE1, MODE2)
+#define MODES_TIEABLE_P(MODE1, MODE2) \
+ ix86_modes_tieable_p ((MODE1), (MODE2))
/* It is possible to write patterns to move flags; but until someone
does it, */
reg number REGNO. This could be a conditional expression
or could index an array. */
-#define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
+#define REGNO_REG_CLASS(REGNO) (regclass_map[(REGNO)])
/* When this hook returns true for MODE, the compiler allows
registers explicitly used in the rtl to be used as spill registers
and -8 for 64bit targets, we need to make sure all stack pointer adjustments
are in multiple of 4 for 32bit targets and 8 for 64bit targets. */
-#define PUSH_ROUNDING(BYTES) ROUND_UP (BYTES, UNITS_PER_WORD)
+#define PUSH_ROUNDING(BYTES) ROUND_UP ((BYTES), UNITS_PER_WORD)
/* If defined, the maximum amount of space required for outgoing arguments
will be computed and placed into the variable `crtl->outgoing_args_size'.
/* Output assembler code to FILE to increment profiler label # LABELNO
for profiling a function entry. */
-#define FUNCTION_PROFILER(FILE, LABELNO) x86_function_profiler (FILE, LABELNO)
+#define FUNCTION_PROFILER(FILE, LABELNO) \
+ x86_function_profiler ((FILE), (LABELNO))
#define MCOUNT_NAME "_mcount"
gen_rtx_MEM (VOIDmode, gen_rtx_REG (VOIDmode, STACK_POINTER_REGNUM))
/* After the prologue, RA is at -4(AP) in the current frame. */
-#define RETURN_ADDR_RTX(COUNT, FRAME) \
- ((COUNT) == 0 \
- ? gen_rtx_MEM (Pmode, plus_constant (Pmode, arg_pointer_rtx, \
- -UNITS_PER_WORD)) \
- : gen_rtx_MEM (Pmode, plus_constant (Pmode, FRAME, UNITS_PER_WORD)))
+#define RETURN_ADDR_RTX(COUNT, FRAME) \
+ ((COUNT) == 0 \
+ ? gen_rtx_MEM (Pmode, plus_constant (Pmode, arg_pointer_rtx, \
+ -UNITS_PER_WORD)) \
+ : gen_rtx_MEM (Pmode, plus_constant (Pmode, (FRAME), UNITS_PER_WORD)))
/* PC is dbx register 8; let's use that column for RA. */
#define DWARF_FRAME_RETURN_COLUMN (TARGET_64BIT ? 16 : 8)
#undef ASM_OUTPUT_FUNCTION_LABEL
#define ASM_OUTPUT_FUNCTION_LABEL(FILE, NAME, DECL) \
- ix86_asm_output_function_label (FILE, NAME, DECL)
+ ix86_asm_output_function_label ((FILE), (NAME), (DECL))
/* Under some conditions we need jump tables in the text section,
because the assembler cannot handle label differences between
Don't rename evex to non-evex sse registers. */
-#define HARD_REGNO_RENAME_OK(SRC, TARGET) (!STACK_REGNO_P (SRC) && \
- (EXT_REX_SSE_REGNO_P (SRC) == \
- EXT_REX_SSE_REGNO_P (TARGET)))
+#define HARD_REGNO_RENAME_OK(SRC, TARGET) \
+ (!STACK_REGNO_P (SRC) \
+ && EXT_REX_SSE_REGNO_P (SRC) == EXT_REX_SSE_REGNO_P (TARGET))
\f
#define FASTCALL_PREFIX '@'
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