radeon: extend CIK_UCONFIG_REG_END for performance counters
authorNicolai Hähnle <nhaehnle@gmail.com>
Wed, 11 Nov 2015 13:38:59 +0000 (14:38 +0100)
committerNicolai Hähnle <nicolai.haehnle@amd.com>
Wed, 25 Nov 2015 14:28:00 +0000 (15:28 +0100)
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
src/gallium/drivers/radeon/r600d_common.h
src/gallium/drivers/radeonsi/sid.h

index f32da063a4bf2eafaabbddb078de7b544a5600f3..b8e656405289d6eeddf45385fde0c3b975178363 100644 (file)
@@ -31,7 +31,7 @@
 #define SI_SH_REG_OFFSET                     0x0000B000
 #define SI_SH_REG_END                        0x0000C000
 #define CIK_UCONFIG_REG_OFFSET               0x00030000
-#define CIK_UCONFIG_REG_END                  0x00031000
+#define CIK_UCONFIG_REG_END                  0x00038000
 
 #define PKT_TYPE_S(x)                   (((x) & 0x3) << 30)
 #define PKT_COUNT_S(x)                  (((x) & 0x3FFF) << 16)
index 0c48340beef1ceb79d8819b16b6a619f11c05cfa..c2e177dd7f9bd69219b1f9506d21aa4f83e4929c 100644 (file)
@@ -32,7 +32,7 @@
 #define SI_CONTEXT_REG_OFFSET                0x00028000
 #define SI_CONTEXT_REG_END                   0x00029000
 #define CIK_UCONFIG_REG_OFFSET               0x00030000
-#define CIK_UCONFIG_REG_END                  0x00031000
+#define CIK_UCONFIG_REG_END                  0x00038000
 
 #define EVENT_TYPE_CACHE_FLUSH                  0x6
 #define EVENT_TYPE_PS_PARTIAL_FLUSH            0x10