pan/midgard: Improve disassembler robustness
authorAlyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Wed, 14 Aug 2019 21:11:54 +0000 (14:11 -0700)
committerAlyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Wed, 14 Aug 2019 22:09:17 +0000 (15:09 -0700)
Some memory corruption / etc issues let to an accidental "fuzzing" of
the disassembler ;) This uncovered some issues leading to a disassembler
hang, so let's fix that.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
src/panfrost/midgard/disassemble.c

index 1092fcf73747e610775749e4aea98622fc0c11e4..3e18c19593b7b82fbd42abb18377ddc2e562fa3d 100644 (file)
@@ -283,6 +283,7 @@ bits_for_mode(midgard_reg_mode mode)
         case midgard_reg_mode_64:
                 return 64;
         default:
+                unreachable("Invalid reg mode");
                 return 0;
         }
 }
@@ -410,6 +411,14 @@ print_mask_vec16(uint8_t mask, midgard_dest_override override)
 static void
 print_mask(uint8_t mask, unsigned bits, midgard_dest_override override)
 {
+        if (bits < 16) {
+                /* Shouldn't happen but with junk / out-of-spec shaders it
+                 * would cause an infinite loop */
+
+                printf("/* XXX: bits = %d */", bits);
+                return;
+        }
+
         if (bits == 8) {
                 print_mask_vec16(mask, override);
                 return;