blt and use of rv_add

diff --git a/riscv/insns/blt.h b/riscv/insns/blt.h
index c54fb7693a01e5c8e57c47f2e41faa77fb35fe87..85b0be61fd95f933cb12119ff3db9b841e085da5 100644 (file)
--- a/riscv/insns/blt.h
+++ b/riscv/insns/blt.h
@@ -1,2 +1,2 @@
-if(sreg_t(RS1) < sreg_t(RS2))
+if(rv_lt(sreg_t(RS1), sreg_t(RS2)))
   set_pc(BRANCH_TARGET);

diff --git a/riscv/insns/bltu.h b/riscv/insns/bltu.h
index ff75e8a6da36a1e7b6f662685499b53aaf7b997f..d1d6b31de0f4103b61ca8daaac5ab7ae9f9d9dd6 100644 (file)
--- a/riscv/insns/bltu.h
+++ b/riscv/insns/bltu.h
@@ -1,2 +1,2 @@
-if(RS1 < RS2)
+if(rv_lt(RS1, RS2))
   set_pc(BRANCH_TARGET);

diff --git a/riscv/insns/lb.h b/riscv/insns/lb.h
index 0f0999caa385317e543baca04266e73d63febe7f..61e44dabffe5ec4d956bf0d85ebfdc141d9fabe4 100644 (file)
--- a/riscv/insns/lb.h
+++ b/riscv/insns/lb.h
@@ -1 +1 @@
-WRITE_RD(MMU.load_int8(RS1 + insn.i_imm()));
+WRITE_RD(MMU.load_int8(rv_add(RS1, insn.i_imm())));

diff --git a/riscv/insns/lbu.h b/riscv/insns/lbu.h
index 64d4a688b97d57d3ede6a7b9545157f52f0b145e..2165875816194747d2a9f1a44dc3230ad8769bb6 100644 (file)
--- a/riscv/insns/lbu.h
+++ b/riscv/insns/lbu.h
@@ -1 +1 @@
-WRITE_RD(MMU.load_uint8(RS1 + insn.i_imm()));
+WRITE_RD(MMU.load_uint8(rv_add(RS1, insn.i_imm())));

diff --git a/riscv/insns/ld.h b/riscv/insns/ld.h
index 1122b9807b3b273bb008972d35d87de087cad128..6349603c0ccf79a38780746ae4c8532f16690617 100644 (file)
--- a/riscv/insns/ld.h
+++ b/riscv/insns/ld.h
@@ -1,2 +1,2 @@
 require_rv64;
-WRITE_RD(MMU.load_int64(RS1 + insn.i_imm()));
+WRITE_RD(MMU.load_int64(rv_add(RS1, insn.i_imm())));

diff --git a/riscv/insns/lw.h b/riscv/insns/lw.h
index 4e8ed040d19e2e2a646c1ea4e97abe113a998720..45e082a6f7fe2ebc66cbbfc7c727495c0100d9ad 100644 (file)
--- a/riscv/insns/lw.h
+++ b/riscv/insns/lw.h
@@ -1 +1 @@
-WRITE_RD(MMU.load_int32(RS1 + insn.i_imm()));
+WRITE_RD(MMU.load_int32(rv_add(RS1, insn.i_imm())));