r600g: don't use RADEON_GEM_DOMAIN_CPU
authorMarek Olšák <maraeo@gmail.com>
Wed, 3 Aug 2011 17:27:49 +0000 (19:27 +0200)
committerMarek Olšák <maraeo@gmail.com>
Tue, 16 Aug 2011 07:15:10 +0000 (09:15 +0200)
Also staging resources shouldn't be allocated with the initial domain
being VRAM.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
src/gallium/winsys/r600/drm/r600_bo.c
src/gallium/winsys/r600/drm/r600_priv.h

index 9fc799a158667e3235a219343f189270fb22262d..0e41a1709eeea6f8d5a06d2106d3a7a6dbc43c9d 100644 (file)
@@ -40,26 +40,27 @@ struct r600_bo *r600_bo(struct radeon *radeon,
         * and are used for uploads and downloads from regular
         * resources.  We generate them internally for some transfers.
         */
-       if (usage == PIPE_USAGE_STAGING)
-               domains = RADEON_GEM_DOMAIN_CPU | RADEON_GEM_DOMAIN_GTT;
-       else
-               domains = (RADEON_GEM_DOMAIN_CPU |
-                               RADEON_GEM_DOMAIN_GTT |
-                               RADEON_GEM_DOMAIN_VRAM);
-
-       switch(usage) {
-       case PIPE_USAGE_DYNAMIC:
-       case PIPE_USAGE_STREAM:
-       case PIPE_USAGE_STAGING:
+       if (usage == PIPE_USAGE_STAGING) {
+               domains = RADEON_GEM_DOMAIN_GTT;
                initial_domain = RADEON_GEM_DOMAIN_GTT;
-               break;
-       case PIPE_USAGE_DEFAULT:
-       case PIPE_USAGE_STATIC:
-       case PIPE_USAGE_IMMUTABLE:
-       default:
-               initial_domain = RADEON_GEM_DOMAIN_VRAM;
-               break;
+       } else {
+               domains = RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM;
+
+               switch(usage) {
+               case PIPE_USAGE_DYNAMIC:
+               case PIPE_USAGE_STREAM:
+               case PIPE_USAGE_STAGING:
+                       initial_domain = RADEON_GEM_DOMAIN_GTT;
+                       break;
+               case PIPE_USAGE_DEFAULT:
+               case PIPE_USAGE_STATIC:
+               case PIPE_USAGE_IMMUTABLE:
+               default:
+                       initial_domain = RADEON_GEM_DOMAIN_VRAM;
+                       break;
+               }
        }
+
        rbo = radeon_bo(radeon, 0, size, alignment, binding, initial_domain);
        if (rbo == NULL) {
                return NULL;
@@ -87,9 +88,7 @@ struct r600_bo *r600_bo_handle(struct radeon *radeon, struct winsys_handle *whan
        }
 
        pipe_reference_init(&bo->reference, 1);
-       bo->domains = (RADEON_GEM_DOMAIN_CPU |
-                       RADEON_GEM_DOMAIN_GTT |
-                       RADEON_GEM_DOMAIN_VRAM);
+       bo->domains = RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM;
 
        if (stride)
                *stride = whandle->stride;
index 930cf81813afff6f11089ee6f24446221e903ceb..5bb515d743e458f602a8858fc9f71b3cee38fa77 100644 (file)
@@ -136,8 +136,7 @@ static INLINE unsigned r600_context_bo_reloc(struct r600_context *ctx, struct r6
 
        reloc_index = ctx->radeon->ws->trans_add_reloc(
                                ctx->cs, bo->cs_buf,
-                               rbo->domains & (RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM),
-                               rbo->domains & (RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM),
+                               rbo->domains, rbo->domains,
                                (void**)&ctx->reloc, &ctx->creloc);
 
        radeon_bo_reference(ctx->radeon, &ctx->bo[reloc_index], bo);