ARM: Make sure some undefined thumb32 instructions fault.

diff --git a/src/arch/arm/isa/formats/branch.isa b/src/arch/arm/isa/formats/branch.isa
index 1936a07bbef810727f3f2ceb6820caa60ba58695..53a2c95b44c9ef88fcc07517d15fe251fe28ed84 100644 (file)
--- a/src/arch/arm/isa/formats/branch.isa
+++ b/src/arch/arm/isa/formats/branch.isa
@@ -240,6 +240,9 @@ def format Thumb32BranchesAndMiscCtrl() {{
             }
           case 0x4:
             {
+                if (bits(machInst, 0) == 1) {
+                    return new Unknown(machInst);
+                }
                 const uint32_t s = bits(machInst, 26);
                 const uint32_t i1 = !(bits(machInst, 13) ^ s);
                 const uint32_t i2 = !(bits(machInst, 11) ^ s);

diff --git a/src/arch/arm/isa/formats/data.isa b/src/arch/arm/isa/formats/data.isa
index 9f0952a627811bae2351eb81ee1ad7e94913fb2f..6fb698e759b87f3ff3bee5cd28cc2f9446f81ae9 100644 (file)
--- a/src/arch/arm/isa/formats/data.isa
+++ b/src/arch/arm/isa/formats/data.isa
@@ -579,6 +579,9 @@ def format Thumb32DataProcReg() {{
         const uint32_t op1 = bits(machInst, 23, 20);
         const IntRegIndex rn = (IntRegIndex)(uint32_t)bits(machInst, 19, 16);
         const uint32_t op2 = bits(machInst, 7, 4);
+        if (bits(machInst, 15, 12) != 0xf) {
+            return new Unknown(machInst);
+        }
         if (bits(op1, 3) != 1) {
             if (op2 == 0) {
                 IntRegIndex rd = (IntRegIndex)(uint32_t)bits(machInst, 11, 8);
@@ -609,8 +612,9 @@ def format Thumb32DataProcReg() {{
                     return new MovRegRegCc(machInst, rd,
                             INTREG_ZERO, rn, rm, ROR);
                 }
-            }
-            {
+            } else if (bits(op2, 3) == 0) {
+                return new Unknown(machInst);
+            } else {
                 const IntRegIndex rd =
                     (IntRegIndex)(uint32_t)bits(machInst, 11, 8);
                 const IntRegIndex rm =

diff --git a/src/arch/arm/isa/formats/mem.isa b/src/arch/arm/isa/formats/mem.isa
index b055b080fdb822eacbba110d716c02adb8492886..41706c48d25e33ece03c744a7b0ab8fd661b159e 100644 (file)
--- a/src/arch/arm/isa/formats/mem.isa
+++ b/src/arch/arm/isa/formats/mem.isa
@@ -469,6 +469,9 @@ def format Thumb32StoreSingle() {{
         uint32_t op2 = bits(machInst, 11, 6);
         bool op2Puw = ((op2 & 0x24) == 0x24 ||
                        (op2 & 0x3c) == 0x30);
+        if (RN == 0xf) {
+            return new Unknown(machInst);
+        }
         if (op1 == 4) {
             return new %(strb_imm)s(machInst, RT, RN, true, IMMED_11_0);
         } else if (op1 == 0 && op2Puw) {

diff --git a/src/arch/arm/isa/formats/mult.isa b/src/arch/arm/isa/formats/mult.isa
index bd101374a6e82efd5d645ee1e173f1ac980fb08c..1335ae9caf83706796412679f8760613cc7de28f 100644 (file)
--- a/src/arch/arm/isa/formats/mult.isa
+++ b/src/arch/arm/isa/formats/mult.isa
@@ -336,6 +336,7 @@ def format Thumb32LongMulMulAccAndDiv() {{
                     return new Smlsld(machInst, rdlo, rdhi, rn, rm);
                 }
             }
+            break;
           case 0x6:
             if (op2 == 0) {
                 return new Umlal(machInst, rdlo, rdhi, rn, rm);