r600: move misc regs from general state
authorAlex Deucher <alexdeucher@gmail.com>
Thu, 20 Aug 2009 15:33:41 +0000 (11:33 -0400)
committerAlex Deucher <alexdeucher@gmail.com>
Thu, 20 Aug 2009 16:12:23 +0000 (12:12 -0400)
These regs don't use the SET_CONTEXT_REG packet,
so they weren't getting set correctly.

src/mesa/drivers/dri/r600/r700_chip.c

index c3c0923ebb0482773c8c4a4baf565e87db1ddce3..43661ec714c5c306e63f9616f549c71b43b4128d 100644 (file)
@@ -59,13 +59,6 @@ GLboolean r700InitChipObject(context_t *context)
     r700->pStateList = (ContextState*) MALLOC (sizeof(ContextState)*sizeof(R700_CHIP_CONTEXT)/sizeof(unsigned int));
     pStateListWork = r700->pStateList;
 
-    // misc
-    LINK_STATES(TA_CNTL_AUX);
-    LINK_STATES(VC_ENHANCE);
-    LINK_STATES(SQ_DYN_GPR_CNTL_PS_FLUSH_REQ);
-    LINK_STATES(DB_DEBUG);
-    LINK_STATES(DB_WATERMARKS);
-
     // SC
     LINK_STATES(PA_SC_SCREEN_SCISSOR_TL);
     LINK_STATES(PA_SC_SCREEN_SCISSOR_BR);
@@ -749,6 +742,15 @@ GLboolean r700SendSQConfig(context_t *context)
        R600_OUT_BATCH(r700->sq_config.SQ_STACK_RESOURCE_MGMT_1.u32All);
        R600_OUT_BATCH(r700->sq_config.SQ_STACK_RESOURCE_MGMT_2.u32All);
         END_BATCH();
+
+       BEGIN_BATCH_NO_AUTOSTATE(15);
+       R600_OUT_BATCH_REGVAL(TA_CNTL_AUX, r700->TA_CNTL_AUX.u32All);
+       R600_OUT_BATCH_REGVAL(VC_ENHANCE, r700->VC_ENHANCE.u32All);
+       R600_OUT_BATCH_REGVAL(R7xx_SQ_DYN_GPR_CNTL_PS_FLUSH_REQ, r700->SQ_DYN_GPR_CNTL_PS_FLUSH_REQ.u32All);
+       R600_OUT_BATCH_REGVAL(DB_DEBUG, r700->DB_DEBUG.u32All);
+       R600_OUT_BATCH_REGVAL(DB_WATERMARKS, r700->DB_WATERMARKS.u32All);
+        END_BATCH();
+
        COMMIT_BATCH();
 
        return GL_TRUE;