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diff --git a/openpower/sv/cr_int_predication.mdwn b/openpower/sv/cr_int_predication.mdwn
index 92c335cd9da4e674692e77d4a2325a300c7a697c..8baa3a2ef7f613397246ddf45954df74c6d86f00 100644 (file)
--- a/openpower/sv/cr_int_predication.mdwn
+++ b/openpower/sv/cr_int_predication.mdwn
@@ -211,12 +211,9 @@ Note that:
 * in the scalar case the CR-Vector assessment
   is stored bit-wise starting at the LSB of the
    destination scalar INT
-* in the INT-vector case the result is stored in the
-  LSB of each element in the result vector
-
-Note that element width overrides are respected on the INT src or destination register, however that it is the CR element-width
-override that is used to indicate how many bits of CR results
-are packed/extracted into/from each INT register
+* in the INT-vector case the results are packed into LSBs
+  of the INT Elements, the packing arrangement depending on both
+  elwidth override settings.
 
 # v3.1 setbc instructions