(no commit message)

diff --git a/openpower/sv.mdwn b/openpower/sv.mdwn
index e5d39eb226be2f1fa109a154b7d47593bee2041a..fb2e099b9e8a5bb00e1f6350d55659a4b4e76af7 100644 (file)
--- a/openpower/sv.mdwn
+++ b/openpower/sv.mdwn
@@ -10,7 +10,7 @@ SV is designed as a Vector ISA for Hybrid 3D CPU GPU VPU workloads.
 As such it brings features normally only found in Cray Supercomputers
 (Cray-1, NEC SX-Aurora)
 and in GPUs, but keeps strictly to a *Simple* principle of leveraging
-a *Scalar* ISA, exclisively using "Prefixing". **Not one single actual
+a *Scalar* ISA, exclusively using "Prefixing". **Not one single actual
 explicit Vector opcode exists in SV, at all**.
 
 Fundamental design principles: