Ruby: Remove some unused code

diff --git a/src/mem/ruby/buffers/MessageBuffer.cc b/src/mem/ruby/buffers/MessageBuffer.cc
index 9bb166e0594d8b04fd86c13fe3cdd1c30d0c75ca..cab98cee92a4fa478bac42e777ea1faaf3bb5227 100644 (file)
--- a/src/mem/ruby/buffers/MessageBuffer.cc
+++ b/src/mem/ruby/buffers/MessageBuffer.cc
@@ -161,16 +161,12 @@ MessageBuffer::enqueue(MsgPtr message, Time delta)
     }
     m_msgs_this_cycle++;
 
-    //  assert(m_max_size == -1 || m_size <= m_max_size + 1);
-    // the plus one is a kluge because of a SLICC issue
-
     if (!m_ordering_set) {
         panic("Ordering property of %s has not been set", m_name);
     }
 
     // Calculate the arrival time of the message, that is, the first
     // cycle the message can be dequeued.
-    //printf ("delta %i \n", delta);
     assert(delta>0);
     Time current_time = g_eventQueue_ptr->getTime();
     Time arrival_time = 0;

diff --git a/src/mem/ruby/common/TypeDefines.hh b/src/mem/ruby/common/TypeDefines.hh
index 78d9d618b1975d387f21b7d1dcebab56693e412c..2e8d308e28b7f0b58ea29dc1261e9edac7f69b6a 100644 (file)
--- a/src/mem/ruby/common/TypeDefines.hh
+++ b/src/mem/ruby/common/TypeDefines.hh
@@ -40,12 +40,8 @@ typedef int int32;
 typedef long long int64;
 
 typedef long long integer_t;
-typedef unsigned long long uinteger_t;
 
 typedef int64 Time;
 typedef uint64 physical_address_t;
-typedef uint64 la_t;
-typedef uint64 pa_t;
-typedef integer_t simtime_t;
 
 #endif

diff --git a/src/mem/ruby/network/simple/SimpleNetwork.cc b/src/mem/ruby/network/simple/SimpleNetwork.cc
index a1066f2adfb3f6a1c2737fab943a68486cb5ac74..645d1b4f1e6d733e68002fddeba5adcfc6fd67f1 100644 (file)
--- a/src/mem/ruby/network/simple/SimpleNetwork.cc
+++ b/src/mem/ruby/network/simple/SimpleNetwork.cc
@@ -30,7 +30,6 @@
 #include <numeric>
 
 #include "base/stl_helpers.hh"
-#include "mem/protocol/MachineType.hh"
 #include "mem/protocol/TopologyType.hh"
 #include "mem/ruby/buffers/MessageBuffer.hh"
 #include "mem/ruby/common/NetDest.hh"
@@ -46,18 +45,6 @@
 using namespace std;
 using m5::stl_helpers::deletePointers;
 
-#if 0
-// ***BIG HACK*** - This is actually code that _should_ be in Network.cc
-
-// Note: Moved to Princeton Network
-// calls new to abstract away from the network
-Network*
-Network::createNetwork(int nodes)
-{
-    return new SimpleNetwork(nodes);
-}
-#endif
-
 SimpleNetwork::SimpleNetwork(const Params *p)
     : Network(p)
 {

diff --git a/src/mem/ruby/system/CacheMemory.hh b/src/mem/ruby/system/CacheMemory.hh
index c355ae2e31d8713f4e4b240dcf319d1474ccd40a..f0acba9cb817be5570ffe3af36953f5e9ffe4e4e 100644 (file)
--- a/src/mem/ruby/system/CacheMemory.hh
+++ b/src/mem/ruby/system/CacheMemory.hh
@@ -36,7 +36,6 @@
 #include "base/hashmap.hh"
 #include "mem/protocol/AccessPermission.hh"
 #include "mem/protocol/GenericRequestType.hh"
-#include "mem/protocol/MachineType.hh"
 #include "mem/protocol/RubyRequest.hh"
 #include "mem/protocol/RubyRequestType.hh"
 #include "mem/ruby/common/Address.hh"

diff --git a/src/mem/ruby/system/Sequencer.cc b/src/mem/ruby/system/Sequencer.cc
index ceed068e85091fe1eb4edf75ee6500b981e525e6..711ef12ed3b27ff7f8766bef6b282a078586b77a 100644 (file)
--- a/src/mem/ruby/system/Sequencer.cc
+++ b/src/mem/ruby/system/Sequencer.cc
@@ -504,11 +504,6 @@ Sequencer::hitCallback(SequencerRequest* srequest,
                  success ? "Done" : "SC_Failed", "", "",
                  ruby_request.m_PhysicalAddress, miss_latency);
     }
-#if 0
-    if (request.getPrefetch() == PrefetchBit_Yes) {
-        return; // Ignore the prefetch
-    }
-#endif
 
     // update the data
     if (ruby_request.data != NULL) {
@@ -702,19 +697,6 @@ Sequencer::issueRequest(const RubyRequest& request)
     m_mandatory_q_ptr->enqueue(msg, latency);
 }
 
-#if 0
-bool
-Sequencer::tryCacheAccess(const Address& addr, RubyRequestType type,
-                          RubyAccessMode access_mode,
-                          int size, DataBlock*& data_ptr)
-{
-    CacheMemory *cache =
-        (type == RubyRequestType_IFETCH) ? m_instCache_ptr : m_dataCache_ptr;
-
-    return cache->tryCacheAccess(line_address(addr), type, data_ptr);
-}
-#endif
-
 template <class KEY, class VALUE>
 std::ostream &
 operator<<(ostream &out, const m5::hash_map<KEY, VALUE> &map)

diff --git a/src/mem/ruby/system/Sequencer.hh b/src/mem/ruby/system/Sequencer.hh
index 8859102511636a2b21f03997e2254c11a74b1561..0589d8bbc5b4bec14a33d0d76b1f06f4105b5bcc 100644 (file)
--- a/src/mem/ruby/system/Sequencer.hh
+++ b/src/mem/ruby/system/Sequencer.hh
@@ -112,9 +112,6 @@ class Sequencer : public RubyPort, public Consumer
     void removeRequest(SequencerRequest* request);
 
   private:
-    bool tryCacheAccess(const Address& addr, RubyRequestType type,
-                        const Address& pc, RubyAccessMode access_mode,
-                        int size, DataBlock*& data_ptr);
     void issueRequest(const RubyRequest& request);
 
     void hitCallback(SequencerRequest* request,