r600g: move lots of state inline helpers to separate header.
authorDave Airlie <airlied@redhat.com>
Fri, 3 Sep 2010 00:55:02 +0000 (10:55 +1000)
committerDave Airlie <airlied@redhat.com>
Fri, 3 Sep 2010 00:55:54 +0000 (10:55 +1000)
this gets them out of sight of the main codeflow.

src/gallium/drivers/r600/r600_state.c
src/gallium/drivers/r600/r600_state_inlines.h

index 5ed7563d2d214b4addcf4eec1639b5f6366c3c83..d29f8abbe8442a1a8694fcecf894ab8d9658e854 100644 (file)
@@ -1111,75 +1111,6 @@ static void r600_dsa(struct r600_context *rctx, struct radeon_state *rstate)
        radeon_state_pm4(rstate);
 }
 
-static inline unsigned r600_tex_wrap(unsigned wrap)
-{
-       switch (wrap) {
-       default:
-       case PIPE_TEX_WRAP_REPEAT:
-               return V_03C000_SQ_TEX_WRAP;
-       case PIPE_TEX_WRAP_CLAMP:
-               return V_03C000_SQ_TEX_CLAMP_LAST_TEXEL;
-       case PIPE_TEX_WRAP_CLAMP_TO_EDGE:
-               return V_03C000_SQ_TEX_CLAMP_HALF_BORDER;
-       case PIPE_TEX_WRAP_CLAMP_TO_BORDER:
-               return V_03C000_SQ_TEX_CLAMP_BORDER;
-       case PIPE_TEX_WRAP_MIRROR_REPEAT:
-               return V_03C000_SQ_TEX_MIRROR;
-       case PIPE_TEX_WRAP_MIRROR_CLAMP:
-               return V_03C000_SQ_TEX_MIRROR_ONCE_LAST_TEXEL;
-       case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE:
-               return V_03C000_SQ_TEX_MIRROR_ONCE_HALF_BORDER;
-       case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER:
-               return V_03C000_SQ_TEX_MIRROR_ONCE_BORDER;
-       }
-}
-
-static inline unsigned r600_tex_filter(unsigned filter)
-{
-       switch (filter) {
-       default:
-       case PIPE_TEX_FILTER_NEAREST:
-               return V_03C000_SQ_TEX_XY_FILTER_POINT;
-       case PIPE_TEX_FILTER_LINEAR:
-               return V_03C000_SQ_TEX_XY_FILTER_BILINEAR;
-       }
-}
-
-static inline unsigned r600_tex_mipfilter(unsigned filter)
-{
-       switch (filter) {
-       case PIPE_TEX_MIPFILTER_NEAREST:
-               return V_03C000_SQ_TEX_Z_FILTER_POINT;
-       case PIPE_TEX_MIPFILTER_LINEAR:
-               return V_03C000_SQ_TEX_Z_FILTER_LINEAR;
-       default:
-       case PIPE_TEX_MIPFILTER_NONE:
-               return V_03C000_SQ_TEX_Z_FILTER_NONE;
-       }
-}
-
-static inline unsigned r600_tex_compare(unsigned compare)
-{
-       switch (compare) {
-       default:
-       case PIPE_FUNC_NEVER:
-               return V_03C000_SQ_TEX_DEPTH_COMPARE_NEVER;
-       case PIPE_FUNC_LESS:
-               return V_03C000_SQ_TEX_DEPTH_COMPARE_LESS;
-       case PIPE_FUNC_EQUAL:
-               return V_03C000_SQ_TEX_DEPTH_COMPARE_EQUAL;
-       case PIPE_FUNC_LEQUAL:
-               return V_03C000_SQ_TEX_DEPTH_COMPARE_LESSEQUAL;
-       case PIPE_FUNC_GREATER:
-               return V_03C000_SQ_TEX_DEPTH_COMPARE_GREATER;
-       case PIPE_FUNC_NOTEQUAL:
-               return V_03C000_SQ_TEX_DEPTH_COMPARE_NOTEQUAL;
-       case PIPE_FUNC_GEQUAL:
-               return V_03C000_SQ_TEX_DEPTH_COMPARE_GREATEREQUAL;
-       case PIPE_FUNC_ALWAYS:
-               return V_03C000_SQ_TEX_DEPTH_COMPARE_ALWAYS;
-       }
-}
 
 static INLINE u32 S_FIXED(float value, u32 frac_bits)
 {
@@ -1207,55 +1138,9 @@ static void r600_sampler(struct r600_context *rctx, struct radeon_state *rstate,
                        S_03C004_LOD_BIAS(S_FIXED(CLAMP(state->lod_bias, -16, 16), 6));
        rstate->states[R600_PS_SAMPLER__SQ_TEX_SAMPLER_WORD2_0] = S_03C008_TYPE(1);
        radeon_state_pm4(rstate);
-}
-
-static inline unsigned r600_tex_swizzle(unsigned swizzle)
-{
-       switch (swizzle) {
-       case PIPE_SWIZZLE_RED:
-               return V_038010_SQ_SEL_X;
-       case PIPE_SWIZZLE_GREEN:
-               return V_038010_SQ_SEL_Y;
-       case PIPE_SWIZZLE_BLUE:
-               return V_038010_SQ_SEL_Z;
-       case PIPE_SWIZZLE_ALPHA:
-               return V_038010_SQ_SEL_W;
-       case PIPE_SWIZZLE_ZERO:
-               return V_038010_SQ_SEL_0;
-       default:
-       case PIPE_SWIZZLE_ONE:
-               return V_038010_SQ_SEL_1;
-       }
-}
 
-static inline unsigned r600_format_type(unsigned format_type)
-{
-       switch (format_type) {
-       default:
-       case UTIL_FORMAT_TYPE_UNSIGNED:
-               return V_038010_SQ_FORMAT_COMP_UNSIGNED;
-       case UTIL_FORMAT_TYPE_SIGNED:
-               return V_038010_SQ_FORMAT_COMP_SIGNED;
-       case UTIL_FORMAT_TYPE_FIXED:
-               return V_038010_SQ_FORMAT_COMP_UNSIGNED_BIASED;
-       }
 }
 
-static inline unsigned r600_tex_dim(unsigned dim)
-{
-       switch (dim) {
-       default:
-       case PIPE_TEXTURE_1D:
-               return V_038000_SQ_TEX_DIM_1D;
-       case PIPE_TEXTURE_2D:
-       case PIPE_TEXTURE_RECT:
-               return V_038000_SQ_TEX_DIM_2D;
-       case PIPE_TEXTURE_3D:
-               return V_038000_SQ_TEX_DIM_3D;
-       case PIPE_TEXTURE_CUBE:
-               return V_038000_SQ_TEX_DIM_CUBEMAP;
-       }
-}
 
 static void r600_resource(struct pipe_context *ctx, struct radeon_state *rstate,
                        const struct pipe_sampler_view *view, unsigned id)
index 84866825aab022de9013b9df1eef9ccba57a866f..b4c21d9e12647e563c88c27c9290f7a93210be2d 100644 (file)
@@ -129,7 +129,125 @@ static INLINE uint32_t r600_translate_ds_func(int func)
        return func;
 }
 
-static uint32_t r600_translate_dbformat(enum pipe_format format)
+static inline unsigned r600_tex_wrap(unsigned wrap)
+{
+       switch (wrap) {
+       default:
+       case PIPE_TEX_WRAP_REPEAT:
+               return V_03C000_SQ_TEX_WRAP;
+       case PIPE_TEX_WRAP_CLAMP:
+               return V_03C000_SQ_TEX_CLAMP_LAST_TEXEL;
+       case PIPE_TEX_WRAP_CLAMP_TO_EDGE:
+               return V_03C000_SQ_TEX_CLAMP_HALF_BORDER;
+       case PIPE_TEX_WRAP_CLAMP_TO_BORDER:
+               return V_03C000_SQ_TEX_CLAMP_BORDER;
+       case PIPE_TEX_WRAP_MIRROR_REPEAT:
+               return V_03C000_SQ_TEX_MIRROR;
+       case PIPE_TEX_WRAP_MIRROR_CLAMP:
+               return V_03C000_SQ_TEX_MIRROR_ONCE_LAST_TEXEL;
+       case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE:
+               return V_03C000_SQ_TEX_MIRROR_ONCE_HALF_BORDER;
+       case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER:
+               return V_03C000_SQ_TEX_MIRROR_ONCE_BORDER;
+       }
+}
+
+static inline unsigned r600_tex_filter(unsigned filter)
+{
+       switch (filter) {
+       default:
+       case PIPE_TEX_FILTER_NEAREST:
+               return V_03C000_SQ_TEX_XY_FILTER_POINT;
+       case PIPE_TEX_FILTER_LINEAR:
+               return V_03C000_SQ_TEX_XY_FILTER_BILINEAR;
+       }
+}
+
+static inline unsigned r600_tex_mipfilter(unsigned filter)
+{
+       switch (filter) {
+       case PIPE_TEX_MIPFILTER_NEAREST:
+               return V_03C000_SQ_TEX_Z_FILTER_POINT;
+       case PIPE_TEX_MIPFILTER_LINEAR:
+               return V_03C000_SQ_TEX_Z_FILTER_LINEAR;
+       default:
+       case PIPE_TEX_MIPFILTER_NONE:
+               return V_03C000_SQ_TEX_Z_FILTER_NONE;
+       }
+}
+
+static inline unsigned r600_tex_compare(unsigned compare)
+{
+       switch (compare) {
+       default:
+       case PIPE_FUNC_NEVER:
+               return V_03C000_SQ_TEX_DEPTH_COMPARE_NEVER;
+       case PIPE_FUNC_LESS:
+               return V_03C000_SQ_TEX_DEPTH_COMPARE_LESS;
+       case PIPE_FUNC_EQUAL:
+               return V_03C000_SQ_TEX_DEPTH_COMPARE_EQUAL;
+       case PIPE_FUNC_LEQUAL:
+               return V_03C000_SQ_TEX_DEPTH_COMPARE_LESSEQUAL;
+       case PIPE_FUNC_GREATER:
+               return V_03C000_SQ_TEX_DEPTH_COMPARE_GREATER;
+       case PIPE_FUNC_NOTEQUAL:
+               return V_03C000_SQ_TEX_DEPTH_COMPARE_NOTEQUAL;
+       case PIPE_FUNC_GEQUAL:
+               return V_03C000_SQ_TEX_DEPTH_COMPARE_GREATEREQUAL;
+       case PIPE_FUNC_ALWAYS:
+               return V_03C000_SQ_TEX_DEPTH_COMPARE_ALWAYS;
+       }
+}
+
+static inline unsigned r600_tex_swizzle(unsigned swizzle)
+{
+       switch (swizzle) {
+       case PIPE_SWIZZLE_RED:
+               return V_038010_SQ_SEL_X;
+       case PIPE_SWIZZLE_GREEN:
+               return V_038010_SQ_SEL_Y;
+       case PIPE_SWIZZLE_BLUE:
+               return V_038010_SQ_SEL_Z;
+       case PIPE_SWIZZLE_ALPHA:
+               return V_038010_SQ_SEL_W;
+       case PIPE_SWIZZLE_ZERO:
+               return V_038010_SQ_SEL_0;
+       default:
+       case PIPE_SWIZZLE_ONE:
+               return V_038010_SQ_SEL_1;
+       }
+}
+
+static inline unsigned r600_format_type(unsigned format_type)
+{
+       switch (format_type) {
+       default:
+       case UTIL_FORMAT_TYPE_UNSIGNED:
+               return V_038010_SQ_FORMAT_COMP_UNSIGNED;
+       case UTIL_FORMAT_TYPE_SIGNED:
+               return V_038010_SQ_FORMAT_COMP_SIGNED;
+       case UTIL_FORMAT_TYPE_FIXED:
+               return V_038010_SQ_FORMAT_COMP_UNSIGNED_BIASED;
+       }
+}
+
+static inline unsigned r600_tex_dim(unsigned dim)
+{
+       switch (dim) {
+       default:
+       case PIPE_TEXTURE_1D:
+               return V_038000_SQ_TEX_DIM_1D;
+       case PIPE_TEXTURE_2D:
+       case PIPE_TEXTURE_RECT:
+               return V_038000_SQ_TEX_DIM_2D;
+       case PIPE_TEXTURE_3D:
+               return V_038000_SQ_TEX_DIM_3D;
+       case PIPE_TEXTURE_CUBE:
+               return V_038000_SQ_TEX_DIM_CUBEMAP;
+       }
+}
+
+static inline uint32_t r600_translate_dbformat(enum pipe_format format)
 {
        switch (format) {
        case PIPE_FORMAT_Z16_UNORM:
@@ -143,7 +261,7 @@ static uint32_t r600_translate_dbformat(enum pipe_format format)
        }
 }
 
-static uint32_t r600_translate_colorswap(enum pipe_format format)
+static inline uint32_t r600_translate_colorswap(enum pipe_format format)
 {
        switch (format) {
                /* 8-bit buffers. */