pipe_reference_init(&buffer->base.reference, 1);
buffer->base.screen = pscreen;
- if ((buffer->base.bind & screen->sysmem_bindings) == screen->sysmem_bindings)
- ret = nouveau_buffer_allocate(screen, buffer, 0);
- else
- ret = nouveau_buffer_allocate(screen, buffer, NOUVEAU_BO_GART);
+ if (buffer->base.bind &
+ (screen->vidmem_bindings & screen->sysmem_bindings)) {
+ switch (buffer->base.usage) {
+ case PIPE_USAGE_DEFAULT:
+ case PIPE_USAGE_IMMUTABLE:
+ case PIPE_USAGE_STATIC:
+ buffer->domain = NOUVEAU_BO_VRAM;
+ break;
+ case PIPE_USAGE_DYNAMIC:
+ case PIPE_USAGE_STAGING:
+ case PIPE_USAGE_STREAM:
+ buffer->domain = NOUVEAU_BO_GART;
+ break;
+ default:
+ assert(0);
+ break;
+ }
+ } else {
+ if (buffer->base.bind & screen->vidmem_bindings)
+ buffer->domain = NOUVEAU_BO_VRAM;
+ else
+ if (buffer->base.bind & screen->sysmem_bindings)
+ buffer->domain = NOUVEAU_BO_GART;
+ }
+ ret = nouveau_buffer_allocate(screen, buffer, buffer->domain);
if (ret == FALSE)
goto fail;
util_format_s3tc_init();
+ screen->lowmem_bindings = PIPE_BIND_GLOBAL; /* gallium limit */
+ screen->vidmem_bindings =
+ PIPE_BIND_RENDER_TARGET | PIPE_BIND_DEPTH_STENCIL |
+ PIPE_BIND_DISPLAY_TARGET | PIPE_BIND_SCANOUT | PIPE_BIND_CURSOR |
+ PIPE_BIND_SAMPLER_VIEW |
+ PIPE_BIND_SHADER_RESOURCE | PIPE_BIND_COMPUTE_RESOURCE |
+ PIPE_BIND_GLOBAL;
+ screen->sysmem_bindings =
+ PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_STREAM_OUTPUT;
+
memset(&mm_config, 0, sizeof(mm_config));
screen->mm_GART = nouveau_mm_create(dev,
struct nouveau_client *client;
struct nouveau_pushbuf *pushbuf;
- unsigned sysmem_bindings;
+ unsigned vidmem_bindings; /* PIPE_BIND_* where VRAM placement is desired */
+ unsigned sysmem_bindings; /* PIPE_BIND_* where GART placement is desired */
+ unsigned lowmem_bindings; /* PIPE_BIND_* that require an address < 4 GiB */
+ /*
+ * For bindings with (vidmem & sysmem) bits set set, PIPE_USAGE_* decides
+ * placement.
+ */
uint16_t class_3d;
screen->base.fence.emit = nv30_screen_fence_emit;
screen->base.fence.update = nv30_screen_fence_update;
- screen->base.sysmem_bindings = PIPE_BIND_CONSTANT_BUFFER;
- if (oclass != NV40_3D_CLASS)
- screen->base.sysmem_bindings |= PIPE_BIND_INDEX_BUFFER;
ret = nouveau_screen_init(&screen->base, dev);
if (ret)
FAIL_SCREEN_INIT("nv30_screen_init failed: %d\n", ret);
+ screen->base.vidmem_bindings |= PIPE_BIND_VERTEX_BUFFER;
+ screen->base.sysmem_bindings |= PIPE_BIND_VERTEX_BUFFER;
+ if (oclass == NV40_3D_CLASS) {
+ screen->base.vidmem_bindings |= PIPE_BIND_INDEX_BUFFER;
+ screen->base.sysmem_bindings |= PIPE_BIND_INDEX_BUFFER;
+ }
+
fifo = screen->base.channel->data;
push = screen->base.pushbuf;
push->rsvd_kick = 16;
return NULL;
pscreen = &screen->base.base;
- screen->base.sysmem_bindings = PIPE_BIND_CONSTANT_BUFFER;
-
ret = nouveau_screen_init(&screen->base, dev);
if (ret)
FAIL_SCREEN_INIT("nouveau_screen_init failed: %d\n", ret);
+ /* TODO: Prevent FIFO prefetch before transfer of index buffers and
+ * admit them to VRAM.
+ */
+ screen->base.vidmem_bindings |= PIPE_BIND_CONSTANT_BUFFER |
+ PIPE_BIND_VERTEX_BUFFER;
+ screen->base.sysmem_bindings |=
+ PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_INDEX_BUFFER;
+
screen->base.pushbuf->user_priv = screen;
screen->base.pushbuf->rsvd_kick = 5;
return NULL;
pscreen = &screen->base.base;
- screen->base.sysmem_bindings = PIPE_BIND_CONSTANT_BUFFER;
-
ret = nouveau_screen_init(&screen->base, dev);
if (ret) {
nvc0_screen_destroy(pscreen);
push = screen->base.pushbuf;
push->user_priv = screen;
+ screen->base.vidmem_bindings |= PIPE_BIND_CONSTANT_BUFFER |
+ PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_INDEX_BUFFER;
+ screen->base.sysmem_bindings |=
+ PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_INDEX_BUFFER;
+
pscreen->destroy = nvc0_screen_destroy;
pscreen->context_create = nvc0_create;
pscreen->is_format_supported = nvc0_screen_is_format_supported;