the m5.objects package)'''
super(SimObject, self).__init__('m5.objects', source, tags, add_tags)
if self.fixed:
- raise AttributeError, "Too late to call SimObject now."
+ raise AttributeError("Too late to call SimObject now.")
bisect.insort_right(SimObject.modnames, self.modname)
debug_flags = {}
def DebugFlag(name, desc=None):
if name in debug_flags:
- raise AttributeError, "Flag %s already specified" % name
+ raise AttributeError("Flag {} already specified".format(name))
debug_flags[name] = (name, (), desc)
def CompoundFlag(name, flags, desc=None):
if name in debug_flags:
- raise AttributeError, "Flag %s already specified" % name
+ raise AttributeError("Flag {} already specified".format(name))
compound = tuple(flags)
debug_flags[name] = (name, compound, desc)
else:
memSuffix = '_ub'
else:
- raise Exception, "Unrecognized size for access %d" % size
+ raise Exception("Unrecognized size for access {}".format(size))
return memSuffix
elif not post and not writeback:
base = "MemoryOffset<%s>" % base
else:
- raise Exception, "Illegal combination of post and writeback"
+ raise Exception("Illegal combination of post and writeback")
return base
}};
}
if not regs in (3, 4):
- raise Exception, "Multiplication instructions with %d " + \
- "registers are not implemented"
+ raise Exception("Multiplication instructions with {} ".format(
+ regs) + "registers are not implemented")
if regs == 3:
base = 'Mult3'
# if the argument is an object, we use its attribute map.
myDict.update(d.__dict__)
else:
- raise TypeError, "Template.subst() arg must be or have dictionary"
+ raise TypeError("Template.subst() arg must be or have dictionary")
return template % myDict
# Convert to string.
context.update({ 'name' : name, 'Name' : Name })
try:
vars = self.func(self.user_code, context, *args[0], **args[1])
- except Exception, exc:
+ except Exception as exc:
if debug:
raise
error(lineno, 'error defining "%s": %s.' % (name, exc))
# emission-in-progress.
try:
exec split_setup+fixPythonIndentation(t[2]) in self.exportContext
- except Exception, exc:
+ except Exception as exc:
traceback.print_exc(file=sys.stdout)
if debug:
raise
'def_operand_types : DEF OPERAND_TYPES CODELIT SEMI'
try:
self.operandTypeMap = eval('{' + t[3] + '}')
- except Exception, exc:
+ except Exception as exc:
if debug:
raise
error(t.lineno(1),
'error: operand types must be defined before operands')
try:
user_dict = eval('{' + t[3] + '}', self.exportContext)
- except Exception, exc:
+ except Exception as exc:
if debug:
raise
error(t.lineno(1), 'In def operands: %s' % exc)
def parse_isa_desc(self, *args, **kwargs):
try:
self._parse_isa_desc(*args, **kwargs)
- except ISAParserError, e:
+ except ISAParserError as e:
print(backtrace(self.fileNameStack))
print("At %s:" % e.lineno)
print(e)
def handle_statement(parser, container, statement):
if statement.is_microop:
if statement.mnemonic not in parser.microops.keys():
- raise Exception, "Unrecognized mnemonic: %s" % statement.mnemonic
+ raise Exception("Unrecognized mnemonic: {}".format(
+ statement.mnemonic))
parser.symbols["__microopClassFromInsideTheAssembler"] = \
parser.microops[statement.mnemonic]
try:
raise
elif statement.is_directive:
if statement.name not in container.directives.keys():
- raise Exception, "Unrecognized directive: %s" % statement.name
+ raise Exception("Unrecognized directive: {}".format(
+ statement.name))
parser.symbols["__directiveFunctionFromInsideTheAssembler"] = \
container.directives[statement.name]
try:
print(container.directives)
raise
else:
- raise Exception, "Didn't recognize the type of statement", statement
+ raise Exception("Didn't recognize the type of statement {}".format(
+ statement))
##########################################################################
#
'rom_block : DEF ROM block SEMI'
if not t.parser.rom:
print_error("Rom block found, but no Rom object specified.")
- raise TypeError, "Rom block found, but no Rom object was specified."
+ raise TypeError("Rom block found, but no Rom object was specified.")
for statement in t[3].statements:
handle_statement(t.parser, t.parser.rom, statement)
t[0] = t.parser.rom
def p_macroop_def_0(t):
'macroop_def : DEF MACROOP ID LPAREN ID RPAREN SEMI'
if not t.parser.rom_macroop_type:
- print_error("ROM based macroop found, but no ROM macroop class was specified.")
- raise TypeError, "ROM based macroop found, but no ROM macroop class was specified."
+ print_error("ROM based macroop found, but no ROM macroop " +
+ "class was specified.")
+ raise TypeError("ROM based macroop found, but no ROM macroop " +
+ "class was specified.")
macroop = t.parser.rom_macroop_type(t[3], t[5])
t.parser.macroops[t[3]] = macroop
is_dest = is_dest or is_dest_local
is_src = is_src or not is_dest_local
if extension and extension != op_ext:
- raise Exception, "Inconsistent extensions in double filter."
+ raise Exception("Inconsistent extensions in double filter")
extension = op_ext
next_pos = match.end()
if foundOne:
elif self.size == 'z':
self.dataSize = "((OPSIZE == 8) ? 4 : OPSIZE)"
elif self.size:
- raise Exception, "Unrecognized size type %s!" % self.size
+ raise Exception("Unrecognized size type {}!".format(self.size))
return '''EmulEnv(%(reg)s,
%(regm)s,
%(dataSize)s,
self.regm = reg
self.regmUsed = True
else:
- raise Exception, "EmulEnv is out of register specialization spots."
+ raise Exception("EmulEnv is out of register specialization " +
+ "spots.")
def setSize(self, size):
if not self.size:
self.size = size
else:
if self.size != size:
- raise Exception, "Conflicting register sizes %s and %s!" %\
- (self.size, size)
+ raise Exception("Conflicting register sizes " +
+ "{} and {}!".format(self.size, size))
}};
let {{
def genMacroop(Name, env):
blocks = OutputBlocks()
if not Name in macroopDict:
- raise Exception, "Unrecognized instruction: %s" % Name
+ raise Exception("Unrecognized instruction: {}".format(Name))
macroop = macroopDict[Name]
if not macroop.declared:
if env.doModRM:
self.once = once
self.flags = flags
if flags and not isinstance(flags, (list, tuple)):
- raise Exception, "flags must be a list or tuple of flags"
+ raise Exception("flags must be a list or tuple of flags")
self.className = "MicroDebugFlags" if flags else "MicroDebug"
if destSize is not None:
self.destSize = destSize
if self.srcSize is None:
- raise Exception, "Source size not set."
+ raise Exception("Source size not set.")
if self.destSize is None:
- raise Exception, "Dest size not set."
+ raise Exception("Dest size not set.")
if ext is None:
self.ext = 0
else:
self.ext = 0
else:
if not isinstance(flags, (list, tuple)):
- raise Exception, "flags must be a list or tuple of flags"
+ raise Exception("flags must be a list or tuple of flags")
self.ext = " | ".join(flags)
self.className += "Flags"
self.target = target
if flags:
if not isinstance(flags, (list, tuple)):
- raise Exception, "flags must be a list or tuple of flags"
+ raise Exception("flags must be a list or tuple of flags")
self.cond = " | ".join(flags)
self.className += "Flags"
else:
def __init__(self, flags=None):
if flags:
if not isinstance(flags, (list, tuple)):
- raise Exception, "flags must be a list or tuple of flags"
+ raise Exception("flags must be a list or tuple of flags")
self.cond = " | ".join(flags)
self.className += "Flags"
else:
self.fault = fault
if flags:
if not isinstance(flags, (list, tuple)):
- raise Exception, "flags must be a list or tuple of flags"
+ raise Exception("flags must be a list or tuple of flags")
self.cond = " | ".join(flags)
self.className += "Flags"
else:
def __init__(self, opTypeString):
match = OpType.parser.search(opTypeString)
if match == None:
- raise Exception, "Problem parsing operand type %s" % opTypeString
+ raise Exception("Problem parsing operand type {}".format(
+ opTypeString))
self.reg = match.group("reg")
self.tag = match.group("tag")
self.size = match.group("size")
{"3" : (doBadInstDecode,) },
(doRipRelativeDecode, Name, opTypes, env))
elif opType.tag == None or opType.size == None:
- raise Exception, "Problem parsing operand tag: %s" % opType.tag
+ raise Exception("Problem parsing operand tag: {}".format(
+ opType.tag))
elif opType.tag == "C":
# A control register indexed by the "reg" field
env.addReg(ModRMRegIndex)
env.addressSize, false);''')
Name += "_M"
else:
- raise Exception, "Unrecognized tag %s." % opType.tag
+ raise Exception("Unrecognized tag {}.".format(opType.tag))
# Generate code to return a macroop of the given name which will
# operate in the "emulation environment" env
break
if not protocol_dir:
- raise ValueError, "Could not find %s.slicc in protocol_dirs" % protocol
+ raise ValueError("Could not find {}.slicc in protocol_dirs".format(
+ protocol))
sources = [ protocol_dir.File("%s.slicc" % protocol) ]
try:
self.decl_list = self.parse_file(filename, **kwargs)
- except ParseError, e:
+ except ParseError as e:
if not self.traceback:
sys.exit(str(e))
raise
class Location(object):
def __init__(self, filename, lineno, no_warning=False):
if not isinstance(filename, string_types):
- raise AttributeError, \
- "filename must be a string, found '%s'" % (type(filename), )
- if not isinstance(lineno, (int, long)):
- raise AttributeError, \
- "filename must be an integer, found '%s'" % (type(lineno), )
+ raise AttributeError(
+ "filename must be a string, found {}".format(type(filename)))
+ if not isinstance(lineno, int):
+ raise AttributeError(
+ "filename must be an integer, found {}".format(type(lineno)))
self.filename = filename
self.lineno = lineno
self.no_warning = no_warning
def error(self, message, *args):
if args:
message = message % args
- raise Exception, "%s: Error: %s" % (self, message)
+ raise Exception("{}: Error: {}".format(self, message))
sys.exit("\n%s: Error: %s" % (self, message))
__all__ = [ 'PairContainer', 'Location' ]
projects / gem5.git / commitdiff