mips.md (andsi3): Force operand 1 to a register too.
authorAlexandre Oliva <aoliva@redhat.com>
Mon, 18 Mar 2002 19:17:27 +0000 (19:17 +0000)
committerAlexandre Oliva <aoliva@gcc.gnu.org>
Mon, 18 Mar 2002 19:17:27 +0000 (19:17 +0000)
* config/mips/mips.md (andsi3) [TARGET_MIPS16]: Force operand 1 to
a register too.
(anddi3, iorsi3): Likewise.

From-SVN: r50988

gcc/ChangeLog
gcc/config/mips/mips.md

index 7bbb1b04648d3ad8297d3db2c99531273ee99040..426e706531a6e0bf040ceaa2083f668b10cecdcb 100644 (file)
@@ -1,5 +1,9 @@
 2002-03-18  Alexandre Oliva  <aoliva@redhat.com>
 
+       * config/mips/mips.md (andsi3) [TARGET_MIPS16]: Force operand 1 to
+       a register too.
+       (anddi3, iorsi3): Likewise.
+
        * config/mips/mips.h (ENCODE_SECTION_INFO) [TARGET_MIPS16]: Don't
        use %gprel for symbols that are going to be placed in linkonce
        sections.
index 60d560b686896f0b6eca06dbdbb678bb54f0f5a5..3f1cdd02bf6a89f0a4362cd3baaa5e55ad55b39b 100644 (file)
@@ -3333,7 +3333,10 @@ move\\t%0,%z4\\n\\
   "
 {
   if (TARGET_MIPS16)
-    operands[2] = force_reg (SImode, operands[2]);
+    {
+      operands[1] = force_reg (SImode, operands[1]);
+      operands[2] = force_reg (SImode, operands[2]);
+    }
 }")
 
 (define_insn ""
@@ -3364,7 +3367,10 @@ move\\t%0,%z4\\n\\
   "
 {
   if (TARGET_MIPS16)
-    operands[2] = force_reg (DImode, operands[2]);
+    {
+      operands[1] = force_reg (DImode, operands[1]);
+      operands[2] = force_reg (DImode, operands[2]);
+    }
 }")
 
 (define_insn ""
@@ -3436,7 +3442,10 @@ move\\t%0,%z4\\n\\
   "
 {
   if (TARGET_MIPS16)
-    operands[2] = force_reg (SImode, operands[2]);
+    {
+      operands[1] = force_reg (SImode, operands[1]);
+      operands[2] = force_reg (SImode, operands[2]);
+    }
 }")
 
 (define_insn ""