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diff --git a/HDL_workflow/ECP5_FPGA.mdwn b/HDL_workflow/ECP5_FPGA.mdwn
index 7f9875991b7d64c4476a03e606b7fae054378f49..b3ac31c1e5f86d22a7a394a51f31c92908ea78b9 100644 (file)
--- a/HDL_workflow/ECP5_FPGA.mdwn
+++ b/HDL_workflow/ECP5_FPGA.mdwn
@@ -102,6 +102,12 @@ Finally, we will connect the jumper cables of the same colour from STLINKv2 and
 | Attach the ends of the **WHITE** jumper cables |
 | Attach the ends of the **YELLOW** jumper cables |
 
+Connect the ***ONLY*** USB-to-MicroUSB cable to the STLINKv2 ***ONLY***. This should be the ***ONLY*** USB cable connected to the setup of the STLINKv2 and the FPGA board. The ***ONLY*** things connected to the FPGA board are the coloured jumper cables from the above steps.
+
+If there are multiple USB cables connected the FPGA ***WILL*** be ***DAMAGED***.
+
+Finally, plug in the USB end of the USB-to-MicroUSB cable that is plugged into the STLINKv2 into your computer. Begin testing the SOC on the FPGA (instructions to follow).
+
 ## Connecting the dots:
 
 Accurate render of board for reference <https://github.com/emard/ulx3s/blob/master/pic/ulx3st.jpg>