i965: Add brw_stage_cache_id to map gl stages to brw cache_ids

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

diff --git a/src/mesa/drivers/dri/i965/brw_program_cache.c b/src/mesa/drivers/dri/i965/brw_program_cache.c
index 31f6f1acbf8362f1d3ac87401b8f62c3e38dbc51..54865f8b1b9e65d54f536056dedec44ad3849569 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_program_cache.c
+++ b/src/mesa/drivers/dri/i965/brw_program_cache.c
@@ -78,6 +78,21 @@ struct brw_cache_item {
    struct brw_cache_item *next;
 };
 
+enum brw_cache_id
+brw_stage_cache_id(gl_shader_stage stage)
+{
+   static const enum brw_cache_id stage_ids[] = {
+      BRW_CACHE_VS_PROG,
+      BRW_CACHE_TCS_PROG,
+      BRW_CACHE_TES_PROG,
+      BRW_CACHE_GS_PROG,
+      BRW_CACHE_FS_PROG,
+      BRW_CACHE_CS_PROG,
+   };
+   assert((int)stage >= 0 && stage < ARRAY_SIZE(stage_ids));
+   return stage_ids[stage];
+}
+
 static unsigned
 get_program_string_id(enum brw_cache_id cache_id, const void *key)
 {

diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
index 1b4745ef75360cffdfb15bbb557abf8954843054..445f5e0b5103225af2125e10b08a8a7686146a53 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -180,6 +180,8 @@ void brw_destroy_caches( struct brw_context *brw );
 
 void brw_print_program_cache(struct brw_context *brw);
 
+enum brw_cache_id brw_stage_cache_id(gl_shader_stage stage);
+
 /* intel_batchbuffer.c */
 void brw_require_statebuffer_space(struct brw_context *brw, int size);
 void *brw_state_batch(struct brw_context *brw,