Add a equiv test too

diff --git a/tests/various/abc9.v b/tests/various/abc9.v
index 30ebd4e26c9fb410c5f6bcd9c235fab64efa17dd..e53dcdb21d4581bcc95b8658d1230c3981911783 100644 (file)
--- a/tests/various/abc9.v
+++ b/tests/various/abc9.v
@@ -9,3 +9,10 @@ wire w;
 unknown u(~i, w);
 unknown2 u2(w, o);
 endmodule
+
+module abc9_test031(input clk, d, r, output reg q);
+initial q = 1'b0;
+always @(negedge clk or negedge r)
+    if (r) q <= 1'b0;
+    else q <= d;
+endmodule

diff --git a/tests/various/abc9.ys b/tests/various/abc9.ys
index 5c9a4075d0d79d40491282a1a23d964127c25a8e..9e732bdc8547c357ce70a4e2789be4d909b0927a 100644 (file)
--- a/tests/various/abc9.ys
+++ b/tests/various/abc9.ys
@@ -22,3 +22,19 @@ abc9 -lut 4
 select -assert-count 1 t:$lut r:LUT=2'b01 r:WIDTH=1 %i %i
 select -assert-count 1 t:unknown
 select -assert-none t:$lut t:unknown %% t: %D
+
+design -load read
+hierarchy -top abc9_test031
+proc
+async2sync
+design -save gold
+
+abc9 -lut 4
+check
+design -stash gate
+
+design -import gold -as gold
+design -import gate -as gate
+
+miter -equiv -flatten -make_assert -make_outputs gold gate miter
+sat -seq 10 -verify -prove-asserts -show-ports miter