write_xaiger: sort holes by offset as well as port_id

diff --git a/backends/aiger/xaiger.cc b/backends/aiger/xaiger.cc
index b6a7dbac2c8d562987a5d5fb70901d6a6b1ecba2..7ee5058aeaa3a3efbf405d079496f58c5993adca 100644 (file)
--- a/backends/aiger/xaiger.cc
+++ b/backends/aiger/xaiger.cc
@@ -474,7 +474,8 @@ struct XAigerWriter
                if (holes_mode) {
                        struct sort_by_port_id {
                                bool operator()(const RTLIL::SigBit& a, const RTLIL::SigBit& b) const {
-                                       return a.wire->port_id < b.wire->port_id;
+                                       return a.wire->port_id < b.wire->port_id ||
+                                           (a.wire->port_id == b.wire->port_id && a.offset < b.offset);
                                }
                        };
                        input_bits.sort(sort_by_port_id());