radeonsi: remove CE offset alignment restriction

This was only needed by LOAD_CONST_RAM, which is now only used to load
whole CE.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c
index b514961925f4aae5058a9b27925ce387d82ee172..5086a33969aebe8de6d1bc4b63710d62091951bd 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -113,8 +113,7 @@ static void si_init_descriptors(struct si_descriptors *desc,
                desc->uses_ce = true;
                desc->ce_offset = *ce_offset;
 
-               /* make sure that ce_offset stays 32 byte aligned */
-               *ce_offset += align(element_dw_size * num_elements * 4, 32);
+               *ce_offset += element_dw_size * num_elements * 4;
        }
 }