arch-arm: Add recursion for DTB entry generation inside ArmISA
authorPierre Ayoub <pierre.ayoub.pro@tutanota.com>
Sat, 3 Oct 2020 14:34:26 +0000 (16:34 +0200)
committerPierre Ayoub <pierre.ayoub.pro@tutanota.com>
Tue, 6 Oct 2020 13:56:08 +0000 (13:56 +0000)
In order to generate the ArmPMU's DTB entry, we have to enable recursion
from the ArmISA.

This commit follows this mailing list entry:
https://www.mail-archive.com/gem5-users@gem5.org/msg18401.html

Change-Id: I73012755f0f8c8d4d17278793cf16cb1e8b011df
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/35555
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
src/arch/arm/ArmISA.py

index ebad774ee092fd9e17fbf85c94b65ede1dc893e8..a70989448027fa158578e5303c6cb51ab3e827ee 100644 (file)
@@ -36,6 +36,7 @@
 from m5.params import *
 from m5.proxy import *
 
+from m5.SimObject import SimObject
 from m5.objects.ArmPMU import ArmPMU
 from m5.objects.ArmSystem import SveVectorLength
 from m5.objects.BaseISA import BaseISA
@@ -124,3 +125,7 @@ class ArmISA(BaseISA):
     # allocated, instead of an ArmSystem
     sve_vl_se = Param.SveVectorLength(1,
         "SVE vector length in quadwords (128-bit), SE-mode only")
+
+    # Recurse into subnodes to generate DTB entries. This is mainly needed to
+    # generate the PMU entry.
+    generateDeviceTree = SimObject.recurseDeviceTree