dev-arm: Remove SPI/PPI range check in Gicv3 class
authorGiacomo Travaglini <giacomo.travaglini@arm.com>
Fri, 17 Jul 2020 13:27:19 +0000 (14:27 +0100)
committerGiacomo Travaglini <giacomo.travaglini@arm.com>
Tue, 21 Jul 2020 08:54:31 +0000 (08:54 +0000)
This is not needed since the check will already happen within

* Gicv3Distributor::sendInt
* Gicv3Redistributor::sendPPInt

Change-Id: I1355bde367127513f0501aa19e8f68d302c7a4f4
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/31514
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
src/dev/arm/gic_v3.cc

index b4046017a2a84653534a691824b9c75715674287..575194004930d00deb4975d0fa1d958b9d886713 100644 (file)
@@ -172,8 +172,6 @@ Gicv3::write(PacketPtr pkt)
 void
 Gicv3::sendInt(uint32_t int_id)
 {
-    panic_if(int_id < Gicv3::SGI_MAX + Gicv3::PPI_MAX, "Invalid SPI!");
-    panic_if(int_id >= Gicv3::INTID_SECURE, "Invalid SPI!");
     DPRINTF(Interrupt, "Gicv3::sendInt(): received SPI %d\n", int_id);
     distributor->sendInt(int_id);
 }
@@ -188,8 +186,6 @@ void
 Gicv3::sendPPInt(uint32_t int_id, uint32_t cpu)
 {
     panic_if(cpu >= redistributors.size(), "Invalid cpuID sending PPI!");
-    panic_if(int_id < Gicv3::SGI_MAX, "Invalid PPI!");
-    panic_if(int_id >= Gicv3::SGI_MAX + Gicv3::PPI_MAX, "Invalid PPI!");
     DPRINTF(Interrupt, "Gicv3::sendPPInt(): received PPI %d cpuTarget %#x\n",
             int_id, cpu);
     redistributors[cpu]->sendPPInt(int_id);