nouveau: NV9X is basically a G80, fix issue with NV6X being detected as G80.
authorBen Skeggs <skeggsb@gmail.com>
Thu, 13 Mar 2008 07:08:22 +0000 (18:08 +1100)
committerBen Skeggs <skeggsb@gmail.com>
Thu, 13 Mar 2008 07:08:22 +0000 (18:08 +1100)
src/gallium/drivers/nv50/nv50_screen.c
src/gallium/winsys/dri/nouveau/nouveau_context.c
src/gallium/winsys/dri/nouveau/nouveau_winsys.c

index 62c23c790ca4f01a3f0e784d350c3fc0ada812b6..721c6421d1f03b5906740106657fe4eb4ce79236 100644 (file)
@@ -6,8 +6,9 @@
 
 #include "nouveau/nouveau_stateobj.h"
 
-#define GRCLASS5097_CHIPSETS 0x00000000
-#define GRCLASS8297_CHIPSETS 0x00000010
+#define NV5X_GRCLASS5097_CHIPSETS 0x00000001
+#define NV8X_GRCLASS8297_CHIPSETS 0x00000010
+#define NV9X_GRCLASS8297_CHIPSETS 0x00000004
 
 static boolean
 nv50_screen_is_format_supported(struct pipe_screen *pscreen,
@@ -117,12 +118,24 @@ nv50_screen_create(struct pipe_winsys *ws, struct nouveau_winsys *nvws,
                return NULL;
        }
 
-       if (GRCLASS5097_CHIPSETS & (1 << (chipset & 0x0f))) {
-               tesla_class = 0x5097;
-       } else
-       if (GRCLASS8297_CHIPSETS & (1 << (chipset & 0x0f))) {
-               tesla_class = 0x8297;
-       } else {
+       switch (chipset & 0xf0) {
+       case 0x50:
+               if (NV5X_GRCLASS5097_CHIPSETS & (1 << (chipset & 0x0f)))
+                       tesla_class = 0x5097;
+               break;
+       case 0x80:
+               if (NV8X_GRCLASS8297_CHIPSETS & (1 << (chipset & 0x0f)))
+                       tesla_class = 0x8297;
+               break;
+       case 0x90:
+               if (NV9X_GRCLASS8297_CHIPSETS & (1 << (chipset & 0x0f)))
+                       tesla_class = 0x8297;
+               break;
+       default:
+               break;
+       }
+
+       if (tesla_class == 0) {
                NOUVEAU_ERR("Unknown G8x chipset: NV%02x\n", chipset);
                nv50_screen_destroy(&screen->pipe);
                return NULL;
index 8dac08a5d2187bbdb720fff9bcec9c5e6e3424ff..8b20b3689c64a84976d936b9b0551c3bcc154718 100644 (file)
@@ -75,6 +75,7 @@ nouveau_channel_context_create(struct nouveau_device *nvdev, unsigned chipset)
        switch (chipset & 0xf0) {
        case 0x50:
        case 0x80:
+       case 0x90:
                ret = nouveau_surface_channel_create_nv50(nvc);
                break;
        default:
@@ -109,6 +110,7 @@ nouveau_context_create(const __GLcontextModes *glVis,
                st_share = ((struct nouveau_context *)sharedContextPrivate)->st;
        }
 
+       /* Check for supported arch */
        if ((ret = nouveau_device_get_param(nv_screen->device,
                                            NOUVEAU_GETPARAM_CHIPSET_ID,
                                            &nv->chipset))) {
@@ -116,6 +118,22 @@ nouveau_context_create(const __GLcontextModes *glVis,
                return GL_FALSE;
        }
 
+       switch (nv->chipset & 0xf0) {
+       case 0x30:
+               /* NV30 */
+       case 0x40:
+       case 0x60:
+               /* NV40 */
+       case 0x50:
+       case 0x80:
+       case 0x90:
+               /* G80 */
+               break;
+       default:
+               NOUVEAU_ERR("Unsupported chipset: NV%02x\n", nv->chipset);
+               return GL_FALSE;
+       }
+
        driContextPriv->driverPrivate = (void *)nv;
        nv->nv_screen  = nv_screen;
        nv->dri_screen = driScrnPriv;
@@ -176,10 +194,15 @@ nouveau_context_create(const __GLcontextModes *glVis,
                }
        }
 
-       /*XXX: temporary - disable multi-context/single-channel on non-NV4x */
+       /*XXX: temporary - disable multi-context/single-channel on pre-NV4x */
        switch (nv->chipset & 0xf0) {
        case 0x40:
        case 0x60:
+               /* NV40 class */
+       case 0x50:
+       case 0x80:
+       case 0x90:
+               /* G80 class */
                break;
        default:
                nvc = NULL;
@@ -215,12 +238,17 @@ nouveau_context_create(const __GLcontextModes *glVis,
        }
 
        /* Create pipe */
-       if (nv->chipset < 0x50)
-               ret = nouveau_surface_init_nv04(nv);
-       else
-               ret = nouveau_surface_init_nv50(nv);
-       if (ret) {
-               return GL_FALSE;
+       switch (nv->chipset & 0xf0) {
+       case 0x50:
+       case 0x80:
+       case 0x90:
+               if (nouveau_surface_init_nv50(nv))
+                       return GL_FALSE;
+               break;
+       default:
+               if (nouveau_surface_init_nv04(nv))
+                       return GL_FALSE;
+               break;
        }
 
        if (!getenv("NOUVEAU_FORCE_SOFTPIPE")) {
index dc7c4c3d71d1fafc87a44a280fa0ad29aba59064..64e84fb68e434c516200ff5aeea90b59cb152c23 100644 (file)
@@ -93,6 +93,7 @@ nouveau_pipe_create(struct nouveau_context *nv)
                break;
        case 0x50:
        case 0x80:
+       case 0x90:
                hws_create = nv50_screen_create;
                hw_create = nv50_create;
                break;