freedreno/a6xx: WFI before RB_CCU_CNTL writes
authorRob Clark <robdclark@chromium.org>
Thu, 6 Jun 2019 17:19:07 +0000 (10:19 -0700)
committerRob Clark <robdclark@chromium.org>
Fri, 7 Jun 2019 19:07:29 +0000 (12:07 -0700)
This seems to be in a block of non buffered/context regs.  Blob always
WFIs before write, so probably a good idea.

Annoyingly, compared to ealier gens, it is a bit harder to tell from the
register offset whether it is a buffered reg, it isn't as simple as
everything below 0x2000, it seems.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
src/gallium/drivers/freedreno/a6xx/fd6_draw.c
src/gallium/drivers/freedreno/a6xx/fd6_emit.c

index 7933d3bc2b554b67254eb5ef0ef2a4d6a17148fc..edf4925a3394e2992d45d6591c0c31af61f9f6fa 100644 (file)
@@ -266,6 +266,8 @@ fd6_clear_lrz(struct fd_batch *batch, struct fd_resource *zsbuf, double depth)
        OUT_RING(ring, A2XX_CP_SET_MARKER_0_MODE(RM6_BYPASS));
        emit_marker6(ring, 7);
 
+       OUT_WFI5(ring);
+
        OUT_PKT4(ring, REG_A6XX_RB_CCU_CNTL, 1);
        OUT_RING(ring, 0x10000000);
 
index a48fc11721f953e60268b37abe19a25865a9f1cb..c9766fd382daac0ef74a883f23840d08d2375119 100644 (file)
@@ -1143,6 +1143,8 @@ t7              opcode: CP_WAIT_FOR_IDLE (26) (1 dwords)
 0000000500024068:               70268000
 */
 
+       OUT_WFI5(ring);
+
        WRITE(REG_A6XX_RB_CCU_CNTL, 0x7c400004);
        WRITE(REG_A6XX_RB_UNKNOWN_8E04, 0x00100000);
        WRITE(REG_A6XX_SP_UNKNOWN_AE04, 0x8);