update template comment

diff --git a/riscv/insn_template_sv.cc b/riscv/insn_template_sv.cc
index c2f4b1a80aa258696e87fcc971e13271b591954c..92404e586b9c449eeaa51cde0904f9a37d89e127 100644 (file)
--- a/riscv/insn_template_sv.cc
+++ b/riscv/insn_template_sv.cc
@@ -8,10 +8,10 @@ reg_t FN(processor_t* p, insn_t s_insn, reg_t pc)
   int xlen = ISASZ;
   reg_t npc = sext_xlen(pc + insn_length(INSNCODE));
   // messy way to do it: insn_t is used elsewhere in a union,
-  // so a workaround is to grab the bits from the insn_t
+  // so cannot create virtual functions.
+  // a workaround is to grab the bits from the insn_t
   // and create an sv-variant.  also an opportunity to pass
-  // in the loop index (voffs) which will be added on to
-  // any registers that are marked as "vectorised"
+  // in a stack of other things that are needed.
   insn_bits_t bits = s_insn.bits();
 #ifndef USING_NOREGS
   int vlen = p->get_state()->vl;