Reenable functioning copies.

arch/alpha/isa_desc:
    Reenable copies.

--HG--
extra : convert_revision : 99259c0ff65e742e617cba1c14f5d1bf4be2fee8

diff --git a/arch/alpha/isa_desc b/arch/alpha/isa_desc
index 56e7cb31c9db8ce852a73a7365e73ac7f94a4f18..0da087f975a311238356ec464158e68aeb0195dc 100644 (file)
--- a/arch/alpha/isa_desc
+++ b/arch/alpha/isa_desc
@@ -1854,10 +1854,9 @@ decode OPCODE default Unknown::unknown() {
        0x23: ldt({{ EA = Rb + disp; }}, {{ Fa = Mem.df; }});
        0x2a: ldl_l({{ EA = Rb + disp; }}, {{ Ra.sl = Mem.sl; }}, LOCKED);
        0x2b: ldq_l({{ EA = Rb + disp; }}, {{ Ra.uq = Mem.uq; }}, LOCKED);
-                       {{fault = memAccessObj->copySrcTranslate(EA);}},
-       //0x20: copy_load({{EA = Ra;}}, 
-       //                {{memAccessObj->copySrcTranslate(EA);}},
-       //              IsMemRef, IsLoad, IsCopy);
+       0x20: copy_load({{EA = Ra;}}, 
+                       {{ fault = memAccessObj->copySrcTranslate(EA);}},
+                       IsMemRef, IsLoad, IsCopy);
     }
 
     format LoadOrPrefetch {
@@ -1877,10 +1876,9 @@ decode OPCODE default Unknown::unknown() {
        0x0f: stq_u({{ EA = (Rb + disp) & ~7; }}, {{ Mem.uq = Ra.uq; }});
        0x26: sts({{ EA = Rb + disp; }}, {{ Mem.ul = t_to_s(Fa.uq); }});
        0x27: stt({{ EA = Rb + disp; }}, {{ Mem.df = Fa; }});
-                        {{fault =memAccessObj->copy(EA);}},
-       //0x24: copy_store({{EA = Rb;}},
-       //                 {{memAccessObj->copy(EA);}},
-       //               IsMemRef, IsStore, IsCopy);
+       0x24: copy_store({{EA = Rb;}},
+                        {{ fault = memAccessObj->copy(EA);}},
+                        IsMemRef, IsStore, IsCopy);
     }
 
     format StoreCond {