+2009-09-03 Jie Zhang <jie.zhang@analog.com>
+
+ * config/bfin-parse.y (asm_1): Fix a typo.
+
2009-09-03 Jie Zhang <jie.zhang@analog.com>
* config/bfin-parse.y (asm_1): Add LOOP_BEGIN and LOOP_END.
| CCREG ASSIGN REG _ASSIGN_ASSIGN REG
{
if ((IS_DREG ($3) && IS_DREG ($5))
- || (IS_PREG ($3) && IS_PREG ($3)))
+ || (IS_PREG ($3) && IS_PREG ($5)))
{
notethat ("CCflag: CC = dpregs == dpregs\n");
$$ = CCFLAG (&$3, $5.regno & CODE_MASK, 0, 0, IS_PREG ($3) ? 1 : 0);
+2009-09-03 Jie Zhang <jie.zhang@analog.com>
+
+ * gas/bfin/expected_comparison_errors.l: Expect error on Line 13.
+
2009-09-03 Jie Zhang <jie.zhang@analog.com>
* gas/bfin/loop.s, gas/bfin/loop.d: New test.
.*:10: Error: Bad register in comparison. Input text was P0.
.*:11: Error: Bad register in comparison.
.*:12: Error: Bad register in comparison.
+.*:13: Error: Bad register in comparison. Input text was R0.
.*:14: Error: Bad register in comparison.
.*:15: Error: Bad register in comparison.
.*:16: Error: Bad register in comparison.