i965: Hook up the disassembler for INTEL_DEBUG={wm,vs}.

I was getting tired of doing the dance of INTEL_DEBUG=batch, copying it out,
and running intel-gen4disasm on it.

diff --git a/src/mesa/drivers/dri/i965/Makefile b/src/mesa/drivers/dri/i965/Makefile
index 00a42111da09430f78715f7eab28e9905d6227a8..128afb568660b764b90bc6549f4d3d6646704c91 100644 (file)
--- a/src/mesa/drivers/dri/i965/Makefile
+++ b/src/mesa/drivers/dri/i965/Makefile
@@ -43,6 +43,7 @@ DRIVER_SOURCES = \
        brw_clip_util.c \
        brw_context.c \
        brw_curbe.c \
+       brw_disasm.c \
        brw_draw.c \
        brw_draw_upload.c \
        brw_eu.c \

diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index a1d00cde29ff16c05a76e729c096364549d50082..d9dc3d511c5d6d7d2807af4070105cf9637bce9a 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -709,6 +709,8 @@ void brw_upload_urb_fence(struct brw_context *brw);
  */
 void brw_upload_cs_urb_state(struct brw_context *brw);
 
+/* brw_disasm.c */
+int brw_disasm (FILE *file, struct brw_instruction *inst);
 
 /*======================================================================
  * Inline conversion functions.  These are better-typed than the

diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index d166250b4feaec3136e26eb3341fbeee80a28234..78d457ad2bebcefbdec7d26e836c3e8192ee5b65 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -471,8 +471,9 @@
 #define BRW_CONDITIONAL_GE    4
 #define BRW_CONDITIONAL_L     5
 #define BRW_CONDITIONAL_LE    6
-#define BRW_CONDITIONAL_C     7
+#define BRW_CONDITIONAL_R     7
 #define BRW_CONDITIONAL_O     8
+#define BRW_CONDITIONAL_U     9
 
 #define BRW_DEBUG_NONE        0
 #define BRW_DEBUG_BREAKPOINT  1
@@ -512,6 +513,7 @@
 #define BRW_OPCODE_RSL        11
 #define BRW_OPCODE_ASR        12
 #define BRW_OPCODE_CMP        16
+#define BRW_OPCODE_CMPN       17
 #define BRW_OPCODE_JMPI       32
 #define BRW_OPCODE_IF         34
 #define BRW_OPCODE_IFF        35

diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c b/src/mesa/drivers/dri/i965/brw_disasm.c
index 7556e97cbabe3fab403a5510697f19b899464160..3e22ca6c99d58019c4ebe80306cd45e30c119323 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_disasm.c
+++ b/src/mesa/drivers/dri/i965/brw_disasm.c
@@ -27,7 +27,9 @@
 #include <unistd.h>
 #include <stdarg.h>
 
-#include "gen4asm.h"
+#include "main/mtypes.h"
+
+#include "brw_context.h"
 #include "brw_defines.h"
 
 struct {
@@ -626,13 +628,13 @@ static int imm (FILE *file, GLuint type, struct brw_instruction *inst) {
        format (file, "0x%08xUD", inst->bits3.ud);
        break;
     case BRW_REGISTER_TYPE_D:
-       format (file, "%dD", inst->bits3.id);
+       format (file, "%dD", inst->bits3.d);
        break;
     case BRW_REGISTER_TYPE_UW:
        format (file, "0x%04xUW", (uint16_t) inst->bits3.ud);
        break;
     case BRW_REGISTER_TYPE_W:
-       format (file, "%dW", (int16_t) inst->bits3.id);
+       format (file, "%dW", (int16_t) inst->bits3.d);
        break;
     case BRW_REGISTER_TYPE_UB:
        format (file, "0x%02xUB", (int8_t) inst->bits3.ud);
@@ -644,7 +646,7 @@ static int imm (FILE *file, GLuint type, struct brw_instruction *inst) {
        format (file, "0x%08xV", inst->bits3.ud);
        break;
     case BRW_REGISTER_TYPE_F:
-       format (file, "%-gF", inst->bits3.fd);
+       format (file, "%-gF", inst->bits3.f);
     }
     return 0;
 }
@@ -769,7 +771,7 @@ static int src1 (FILE *file, struct brw_instruction *inst)
     }
 }
 
-int disasm (FILE *file, struct brw_instruction *inst)
+int brw_disasm (FILE *file, struct brw_instruction *inst)
 {
     int        err = 0;
     int space = 0;

diff --git a/src/mesa/drivers/dri/i965/brw_structs.h b/src/mesa/drivers/dri/i965/brw_structs.h
index 8ba7eb27b36bf47f77ee60a477a1da473fabdca0..a3e9823c51a8933f47b86cd8a7f6f64ca57074c6 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_structs.h
+++ b/src/mesa/drivers/dri/i965/brw_structs.h
@@ -1228,7 +1228,9 @@ struct brw_instruction
         GLuint dest_reg_type:3;
         GLuint src0_reg_file:2;
         GLuint src0_reg_type:3;
-        GLuint pad:6;
+        GLuint src1_reg_file:2;        /* 0x00000c00 */
+        GLuint src1_reg_type:3;        /* 0x00007000 */
+        GLuint pad:1;
         GLint dest_indirect_offset:10; /* offset against the deref'd address reg */
         GLuint dest_subreg_nr:3; /* subnr for the address reg a0.x */
         GLuint dest_horiz_stride:2;
@@ -1243,7 +1245,7 @@ struct brw_instruction
         GLuint src0_reg_type:3;
         GLuint src1_reg_file:2;
         GLuint src1_reg_type:3;
-        GLuint pad0:1;
+        GLuint pad:1;
         GLuint dest_writemask:4;
         GLuint dest_subreg_nr:1;
         GLuint dest_reg_nr:8;
@@ -1348,7 +1350,7 @@ struct brw_instruction
         GLuint src1_reg_nr:8;
         GLuint src1_abs:1;
         GLuint src1_negate:1;
-        GLuint pad:1;
+        GLuint src1_address_mode:1;
         GLuint src1_horiz_stride:2;
         GLuint src1_width:3;
         GLuint src1_vert_stride:4;
@@ -1363,7 +1365,7 @@ struct brw_instruction
         GLuint src1_reg_nr:8;
         GLuint src1_abs:1;
         GLuint src1_negate:1;
-        GLuint pad0:1;
+        GLuint src1_address_mode:1;
         GLuint src1_swz_z:2;
         GLuint src1_swz_w:2;
         GLuint pad1:1;
@@ -1377,7 +1379,7 @@ struct brw_instruction
         GLuint src1_subreg_nr:3;
         GLuint src1_abs:1;
         GLuint src1_negate:1;
-        GLuint pad0:1;
+        GLuint src1_address_mode:1;
         GLuint src1_horiz_stride:2;
         GLuint src1_width:3;
         GLuint src1_vert_stride:4;
@@ -1565,6 +1567,7 @@ struct brw_instruction
 
       GLint d;
       GLuint ud;
+      float f;
    } bits3;
 };
 

diff --git a/src/mesa/drivers/dri/i965/brw_vs_emit.c b/src/mesa/drivers/dri/i965/brw_vs_emit.c
index 722307c0150afc3f29590f096ca140ba2e6af768..f0eb6eb2b6123b93dfc0f825c9140ed59c4561c8 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_vs_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_vs_emit.c
@@ -1283,7 +1283,7 @@ void brw_vs_emit(struct brw_vs_compile *c )
    GLuint file;
 
    if (INTEL_DEBUG & DEBUG_VS) {
-      _mesa_printf("vs-emit:\n");
+      _mesa_printf("vs-mesa:\n");
       _mesa_print_program(&c->vp->program.Base); 
       _mesa_printf("\n");
    }
@@ -1595,4 +1595,13 @@ void brw_vs_emit(struct brw_vs_compile *c )
    emit_vertex_write(c);
 
    post_vs_emit(c, end_inst, last_inst);
+
+   if (INTEL_DEBUG & DEBUG_VS) {
+      int i;
+
+      _mesa_printf("vs-native:\n");
+      for (i = 0; i < p->nr_insn; i++)
+        brw_disasm(stderr, &p->store[i]);
+      _mesa_printf("\n");
+   }
 }

diff --git a/src/mesa/drivers/dri/i965/brw_wm_emit.c b/src/mesa/drivers/dri/i965/brw_wm_emit.c
index 9f82916c025633eec53614c34c8be5026b094b4b..2e2885254ef615fbab6740256288498bf418c3b5 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_wm_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_emit.c
@@ -1385,4 +1385,13 @@ void brw_wm_emit( struct brw_wm_compile *c )
                      inst->dst[i]->hw_reg, 
                      inst->dst[i]->spill_slot);
    }
+
+   if (INTEL_DEBUG & DEBUG_WM) {
+      int i;
+
+      _mesa_printf("wm-native:\n");
+      for (i = 0; i < p->nr_insn; i++)
+        brw_disasm(stderr, &p->store[i]);
+      _mesa_printf("\n");
+   }
 }

diff --git a/src/mesa/drivers/dri/i965/brw_wm_glsl.c b/src/mesa/drivers/dri/i965/brw_wm_glsl.c
index 85a4237d5a7c52ec12d767894ec71630f7bcd686..6a726850ff67493af9331f079bc96ba4b6bda1ee 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_wm_glsl.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_glsl.c
@@ -3032,6 +3032,13 @@ static void brw_wm_emit_glsl(struct brw_context *brw, struct brw_wm_compile *c)
            brw_set_predicate_control(p, BRW_PREDICATE_NONE);
     }
     post_wm_emit(c);
+
+    if (INTEL_DEBUG & DEBUG_WM) {
+      _mesa_printf("wm-native:\n");
+      for (i = 0; i < p->nr_insn; i++)
+        brw_disasm(stderr, &p->store[i]);
+      _mesa_printf("\n");
+    }
 }