alpha: Remove TheISA from the Alpha devices.

These are the from the various bits of the tsunami platform. They
primarily consisted of "using TheISA" which could be replaced with
using AlphaISA or removed altogether (I went with the later), and use
of TheISA:: which I replaced with AlphaISA::.

Change-Id: Ic52577c65241a92a3f1ae318a19431f8faa50a66
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22264
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>

diff --git a/src/dev/alpha/tsunami.cc b/src/dev/alpha/tsunami.cc
index 30df89d0c724053cf1b32023135ad2bbb1c9ba6b..3db7c496dbf40af4054f372089f8b797d87ad856 100644 (file)
--- a/src/dev/alpha/tsunami.cc
+++ b/src/dev/alpha/tsunami.cc
@@ -39,15 +39,12 @@
 #include <vector>
 
 #include "arch/alpha/system.hh"
-#include "config/the_isa.hh"
 #include "cpu/intr_control.hh"
 #include "dev/alpha/tsunami_cchip.hh"
 #include "dev/alpha/tsunami_io.hh"
 #include "dev/alpha/tsunami_pchip.hh"
 
 using namespace std;
-//Should this be AlphaISA?
-using namespace TheISA;
 
 Tsunami::Tsunami(const Params *p)
     : Platform(p), system(p->system)

diff --git a/src/dev/alpha/tsunami_cchip.cc b/src/dev/alpha/tsunami_cchip.cc
index 5fe5c5fad6cf4b23ab439d992ebb8c4014a36b91..b670898f428d0d8a76d57f3024ec813469ff3e2d 100644 (file)
--- a/src/dev/alpha/tsunami_cchip.cc
+++ b/src/dev/alpha/tsunami_cchip.cc
@@ -41,7 +41,6 @@
 
 #include "arch/alpha/ev5.hh"
 #include "base/trace.hh"
-#include "config/the_isa.hh"
 #include "cpu/intr_control.hh"
 #include "cpu/thread_context.hh"
 #include "debug/IPI.hh"
@@ -54,9 +53,6 @@
 #include "params/TsunamiCChip.hh"
 #include "sim/system.hh"
 
-//Should this be AlphaISA?
-using namespace TheISA;
-
 TsunamiCChip::TsunamiCChip(const Params *p)
     : BasicPioDevice(p, 0x10000000), tsunami(p->tsunami)
 {
@@ -227,7 +223,8 @@ TsunamiCChip::write(PacketPtr pkt)
                 // The bit is now set and it wasn't before (set)
                 if ((dim[number] & bitvector) && (dir[number] & bitvector))
                 {
-                    tsunami->intrctrl->post(number, TheISA::INTLEVEL_IRQ1, x);
+                    tsunami->intrctrl->post(
+                            number, AlphaISA::INTLEVEL_IRQ1, x);
                     DPRINTF(Tsunami, "dim write resulting in posting dir"
                             " interrupt to cpu %d\n", number);
                 }
@@ -236,7 +233,8 @@ TsunamiCChip::write(PacketPtr pkt)
                 {
                     // The bit was set and now its now clear and
                     // we were interrupting on that bit before
-                    tsunami->intrctrl->clear(number, TheISA::INTLEVEL_IRQ1, x);
+                    tsunami->intrctrl->clear(
+                            number, AlphaISA::INTLEVEL_IRQ1, x);
                     DPRINTF(Tsunami, "dim write resulting in clear"
                             " dir interrupt to cpu %d\n", number);
 
@@ -311,27 +309,25 @@ TsunamiCChip::write(PacketPtr pkt)
                 olddir = dir[number];
                 dim[number] = pkt->getLE<uint64_t>();
                 dir[number] = dim[number] & drir;
-                for (int x = 0; x < 64; x++)
-                {
+                for (int x = 0; x < 64; x++) {
                     bitvector = ULL(1) << x;
                     // Figure out which bits have changed
-                    if ((dim[number] & bitvector) != (olddim & bitvector))
-                    {
+                    if ((dim[number] & bitvector) != (olddim & bitvector)) {
                         // The bit is now set and it wasn't before (set)
-                        if ((dim[number] & bitvector) && (dir[number] & bitvector))
-                        {
-                          tsunami->intrctrl->post(number, TheISA::INTLEVEL_IRQ1, x);
-                          DPRINTF(Tsunami, "posting dir interrupt to cpu 0\n");
-                        }
-                        else if ((olddir & bitvector) &&
-                                !(dir[number] & bitvector))
-                        {
+                        if ((dim[number] & bitvector) &&
+                                (dir[number] & bitvector)) {
+                            tsunami->intrctrl->post(
+                                    number, AlphaISA::INTLEVEL_IRQ1, x);
+                            DPRINTF(Tsunami,
+                                    "posting dir interrupt to cpu 0\n");
+                        } else if ((olddir & bitvector) &&
+                                !(dir[number] & bitvector)) {
                             // The bit was set and now its now clear and
                             // we were interrupting on that bit before
-                            tsunami->intrctrl->clear(number, TheISA::INTLEVEL_IRQ1, x);
-                          DPRINTF(Tsunami, "dim write resulting in clear"
-                                    " dir interrupt to cpu %d\n",
-                                    x);
+                            tsunami->intrctrl->clear(
+                                    number, AlphaISA::INTLEVEL_IRQ1, x);
+                            DPRINTF(Tsunami, "dim write resulting in clear"
+                                    " dir interrupt to cpu %d\n", x);
 
                         }
 
@@ -389,11 +385,12 @@ TsunamiCChip::clearIPI(uint64_t ipintr)
                 // Check if there is a pending ipi
                 if (ipint & cpumask) {
                     ipint &= ~cpumask;
-                    tsunami->intrctrl->clear(cpunum, TheISA::INTLEVEL_IRQ3, 0);
+                    tsunami->intrctrl->clear(
+                            cpunum, AlphaISA::INTLEVEL_IRQ3, 0);
                     DPRINTF(IPI, "clear IPI IPI cpu=%d\n", cpunum);
-                }
-                else
+                } else {
                     warn("clear IPI for CPU=%d, but NO IPI\n", cpunum);
+                }
             }
         }
     }
@@ -411,14 +408,14 @@ TsunamiCChip::clearITI(uint64_t itintr)
         for (int i=0; i < numcpus; i++) {
             uint64_t cpumask = ULL(1) << i;
             if (itintr & cpumask & itint) {
-                tsunami->intrctrl->clear(i, TheISA::INTLEVEL_IRQ2, 0);
+                tsunami->intrctrl->clear(i, AlphaISA::INTLEVEL_IRQ2, 0);
                 itint &= ~cpumask;
                 DPRINTF(Tsunami, "clearing rtc interrupt to cpu=%d\n", i);
             }
         }
-    }
-    else
+    } else {
         panic("Big ITI Clear, but not processors indicated\n");
+    }
 }
 
 void
@@ -435,16 +432,17 @@ TsunamiCChip::reqIPI(uint64_t ipreq)
                 // Check if there is already an ipi (bits 8:11)
                 if (!(ipint & cpumask)) {
                     ipint  |= cpumask;
-                    tsunami->intrctrl->post(cpunum, TheISA::INTLEVEL_IRQ3, 0);
+                    tsunami->intrctrl->post(
+                            cpunum, AlphaISA::INTLEVEL_IRQ3, 0);
                     DPRINTF(IPI, "send IPI cpu=%d\n", cpunum);
-                }
-                else
+                } else {
                     warn("post IPI for CPU=%d, but IPI already\n", cpunum);
+                }
             }
         }
-    }
-    else
+    } else {
         panic("Big IPI Request, but not processors indicated\n");
+    }
 }
 
 
@@ -456,13 +454,12 @@ TsunamiCChip::postRTC()
 
     for (int i = 0; i < size; i++) {
         uint64_t cpumask = ULL(1) << i;
-       if (!(cpumask & itint)) {
-           itint |= cpumask;
-           tsunami->intrctrl->post(i, TheISA::INTLEVEL_IRQ2, 0);
-           DPRINTF(Tsunami, "Posting RTC interrupt to cpu=%d\n", i);
-       }
+        if (!(cpumask & itint)) {
+            itint |= cpumask;
+            tsunami->intrctrl->post(i, AlphaISA::INTLEVEL_IRQ2, 0);
+            DPRINTF(Tsunami, "Posting RTC interrupt to cpu=%d\n", i);
+        }
     }
-
 }
 
 void
@@ -475,11 +472,11 @@ TsunamiCChip::postDRIR(uint32_t interrupt)
 
     for (int i=0; i < size; i++) {
         dir[i] = dim[i] & drir;
-       if (dim[i] & bitvector) {
-              tsunami->intrctrl->post(i, TheISA::INTLEVEL_IRQ1, interrupt);
-              DPRINTF(Tsunami, "posting dir interrupt to cpu %d,"
-                        "interrupt %d\n",i, interrupt);
-       }
+        if (dim[i] & bitvector) {
+            tsunami->intrctrl->post(i, AlphaISA::INTLEVEL_IRQ1, interrupt);
+            DPRINTF(Tsunami, "posting dir interrupt to cpu %d,"
+                    "interrupt %d\n",i, interrupt);
+        }
     }
 }
 
@@ -495,16 +492,16 @@ TsunamiCChip::clearDRIR(uint32_t interrupt)
         drir &= ~bitvector;
         for (int i=0; i < size; i++) {
            if (dir[i] & bitvector) {
-               tsunami->intrctrl->clear(i, TheISA::INTLEVEL_IRQ1, interrupt);
+               tsunami->intrctrl->clear(i, AlphaISA::INTLEVEL_IRQ1, interrupt);
                DPRINTF(Tsunami, "clearing dir interrupt to cpu %d,"
                     "interrupt %d\n",i, interrupt);
 
            }
            dir[i] = dim[i] & drir;
         }
-    }
-    else
+    } else {
         DPRINTF(Tsunami, "Spurrious clear? interrupt %d\n", interrupt);
+    }
 }
 
 

diff --git a/src/dev/alpha/tsunami_io.cc b/src/dev/alpha/tsunami_io.cc
index 339314335f4a111cae72ae90a49ed82efe6cb9b9..9bfb1b63745f410187ff5c6d98de763d46cbec2c 100644 (file)
--- a/src/dev/alpha/tsunami_io.cc
+++ b/src/dev/alpha/tsunami_io.cc
@@ -44,7 +44,6 @@
 
 #include "base/time.hh"
 #include "base/trace.hh"
-#include "config/the_isa.hh"
 #include "debug/Tsunami.hh"
 #include "dev/alpha/tsunami.hh"
 #include "dev/alpha/tsunami_cchip.hh"
@@ -60,9 +59,6 @@
 using std::string;
 using std::ostream;
 
-//Should this be AlphaISA?
-using namespace TheISA;
-
 TsunamiIO::RTC::RTC(const string &n, const TsunamiIOParams *p)
     : MC146818(p->tsunami, n, p->time, p->year_is_bcd, p->frequency),
       tsunami(p->tsunami)

diff --git a/src/dev/alpha/tsunami_pchip.cc b/src/dev/alpha/tsunami_pchip.cc
index 260d191ae001a57ce8b9bf89eade21983a6a0b4f..82f6f2167ed8483887789f6b3862673dc0c318d6 100644 (file)
--- a/src/dev/alpha/tsunami_pchip.cc
+++ b/src/dev/alpha/tsunami_pchip.cc
@@ -39,7 +39,6 @@
 #include <vector>
 
 #include "base/trace.hh"
-#include "config/the_isa.hh"
 #include "debug/Tsunami.hh"
 #include "dev/alpha/tsunami.hh"
 #include "dev/alpha/tsunami_cchip.hh"
@@ -50,8 +49,6 @@
 #include "sim/system.hh"
 
 using namespace std;
-//Should this be AlphaISA?
-using namespace TheISA;
 
 TsunamiPChip::TsunamiPChip(const Params *p)
     : GenericPciHost(p),