Introduce SH2a support.
2004-02-18 Corinna Vinschen <vinschen@redhat.com>
* sh.h (EF_SH2A_NOFPU): New.
2003-12-01 Michael Snyder <msnyder@redhat.com>
* sh.h (EF_SH2A): New.
bfd/ChangeLog:
Introduce SH2a support.
2004-02-18 Corinna Vinschen <vinschen@redhat.com>
* archures.c (bfd_mach_sh2a_nofpu): New.
* bfd-in2.h: Rebuilt.
* cpu-sh.c (SH2A_NOFPU_NEXT): New.
(arch_info_struct): Add sh2a_nofpu.
* elf32-sh.c (sh_elf_set_mach_from_flags): Handle sh2a_nofpu.
2003-12-29 DJ Delorie <dj@redhat.com>
* reloc.c: Add relocs for sh2a.
* bfd-in2.h: Regenerate.
* libbfd.hh: Regenerate.
2003-12-01 Michael Snyder <msnyder@redhat.com>
* archures.c (bfd_mach_sh2a): New.
* bfd-in2.h: Rebuilt.
* cpu-sh.c (SH_NEXT, SH2_NEXT, etc.): Change defines to enums.
(SH2A_NEXT): New.
(arch_info_struct): Add sh2a.
* elf32-sh.c (sh_elf_set_mach_from_flags): Handle sh2a.
binutils/ChangeLog:
* readelf.c (get_machine_flags <EM_SH>): Handle EF_SH2A and
EF_SH2A_NOFPU.
gas/ChangeLog:
Introduce SH2a support.
2004-02-24 Corinna Vinschen <vinschen@redhat.com>
* config/tc-sh.c (get_specific): Change arch_sh2a_up to
arch_sh2a_nofpu_up.
2004-02-24 Corinna Vinschen <vinschen@redhat.com>
* config/tc-sh.c (md_parse_option): Add sh2a-nofpu ISA handling.
2004-02-20 Corinna Vinschen <vinschen@redhat.com>
* config/tc-sh.c (sh_elf_final_processing): Move sh2a recognition
to end of conditional expression.
2004-02-20 Corinna Vinschen <vinschen@redhat.com>
* config/tc-sh.c: Add sh2a-nofpu support.
2003-12-29 DJ Delorie <dj@redhat.com>
* tc-sh.c: Add sh2a support.
(parse_reg): Add tbr.
(parse_at): Support @@(disp,tbr).
(get_specific): Support sh2a opcodes.
(insert4): New, for 4 byte relocs.
(build_Mytes): Support sh2a opcodes.
(md_apply_fix3_Mytes): Support sh2a opcodes.
2003-12-02 Michael Snyder <msnyder@redhat.com>
* config/tc-sh.c (md_parse_option): Handle sh2a.
(sh_elf_final_processing): Ditto.
gas/testsuite/ChangeLog:
2003-12-30 DJ Delorie <dj@redhat.com>
* gas/sh/sh2a.s: New.
* gas/sh/sh2a.d: New.
* gas/sh/basic.exp: Add it.
+2004-07-29 Alexandre Oliva <aoliva@redhat.com>
+
+ Introduce SH2a support.
+ 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
+ * archures.c (bfd_mach_sh2a_nofpu): New.
+ * bfd-in2.h: Rebuilt.
+ * cpu-sh.c (SH2A_NOFPU_NEXT): New.
+ (arch_info_struct): Add sh2a_nofpu.
+ * elf32-sh.c (sh_elf_set_mach_from_flags): Handle sh2a_nofpu.
+ 2003-12-29 DJ Delorie <dj@redhat.com>
+ * reloc.c: Add relocs for sh2a.
+ * bfd-in2.h: Regenerate.
+ * libbfd.hh: Regenerate.
+ 2003-12-01 Michael Snyder <msnyder@redhat.com>
+ * archures.c (bfd_mach_sh2a): New.
+ * bfd-in2.h: Rebuilt.
+ * cpu-sh.c (SH_NEXT, SH2_NEXT, etc.): Change defines to enums.
+ (SH2A_NEXT): New.
+ (arch_info_struct): Add sh2a.
+ * elf32-sh.c (sh_elf_set_mach_from_flags): Handle sh2a.
+
2004-07-28 Nick Clifton <nickc@redhat.com>
John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
.#define bfd_mach_sh 1
.#define bfd_mach_sh2 0x20
.#define bfd_mach_sh_dsp 0x2d
+.#define bfd_mach_sh2a 0x2a
+.#define bfd_mach_sh2a_nofpu 0x2b
.#define bfd_mach_sh2e 0x2e
.#define bfd_mach_sh3 0x30
.#define bfd_mach_sh3_nommu 0x31
#define bfd_mach_sh 1
#define bfd_mach_sh2 0x20
#define bfd_mach_sh_dsp 0x2d
+#define bfd_mach_sh2a 0x2a
+#define bfd_mach_sh2a_nofpu 0x2b
#define bfd_mach_sh2e 0x2e
#define bfd_mach_sh3 0x30
#define bfd_mach_sh3_nommu 0x31
/* Renesas / SuperH SH relocs. Not all of these appear in object files. */
BFD_RELOC_SH_PCDISP8BY2,
BFD_RELOC_SH_PCDISP12BY2,
+ BFD_RELOC_SH_IMM3,
+ BFD_RELOC_SH_IMM3U,
+ BFD_RELOC_SH_DISP12,
+ BFD_RELOC_SH_DISP12BY2,
+ BFD_RELOC_SH_DISP12BY4,
+ BFD_RELOC_SH_DISP12BY8,
+ BFD_RELOC_SH_DISP20,
+ BFD_RELOC_SH_DISP20BY8,
BFD_RELOC_SH_IMM4,
BFD_RELOC_SH_IMM4BY2,
BFD_RELOC_SH_IMM4BY4,
#define SH4_NOFPU_NEXT &arch_info_struct[11]
#define SH4_NOMMU_NOFPU_NEXT &arch_info_struct[12]
#define SH4A_NOFPU_NEXT &arch_info_struct[13]
+#define SH2A_NEXT &arch_info_struct[14]
+#define SH2A_NOFPU_NEXT &arch_info_struct[15]
#define SH64_NEXT NULL
static const bfd_arch_info_type arch_info_struct[] =
bfd_default_scan,
SH4A_NOFPU_NEXT
},
+ {
+ 32, /* 32 bits in a word. */
+ 32, /* 32 bits in an address. */
+ 8, /* 8 bits in a byte. */
+ bfd_arch_sh,
+ bfd_mach_sh2a,
+ "sh", /* Arch_name. */
+ "sh2a", /* Printable name. */
+ 1,
+ FALSE, /* Not the default. */
+ bfd_default_compatible,
+ bfd_default_scan,
+ SH2A_NEXT
+ },
+ {
+ 32, /* 32 bits in a word. */
+ 32, /* 32 bits in an address. */
+ 8, /* 8 bits in a byte. */
+ bfd_arch_sh,
+ bfd_mach_sh2a_nofpu,
+ "sh", /* Arch_name. */
+ "sh2a-nofpu", /* Printable name. */
+ 1,
+ FALSE, /* Not the default. */
+ bfd_default_compatible,
+ bfd_default_scan,
+ SH2A_NOFPU_NEXT
+ },
{
64, /* 64 bits in a word */
64, /* 64 bits in an address */
{ bfd_mach_sh2, arch_sh2, arch_sh2_up },
{ bfd_mach_sh2e, arch_sh2e, arch_sh2e_up },
{ bfd_mach_sh_dsp, arch_sh_dsp, arch_sh_dsp_up },
+ { bfd_mach_sh2a, arch_sh2a, arch_sh2a_up },
+ { bfd_mach_sh2a_nofpu, arch_sh2a_nofpu, arch_sh2a_nofpu_up },
{ bfd_mach_sh3, arch_sh3, arch_sh3_up },
{ bfd_mach_sh3_nommu, arch_sh3_nommu, arch_sh3_nommu_up },
{ bfd_mach_sh3_dsp, arch_sh3_dsp, arch_sh3_dsp_up },
}
if (! sh_merge_bfd_arch (ibfd, obfd))
- return FALSE;
+ {
+ _bfd_error_handler ("%s: uses instructions which are incompatible "
+ "with instructions used in previous modules",
+ bfd_archive_filename (ibfd));
+ bfd_set_error (bfd_error_bad_value);
+ return FALSE;
+ }
elf_elfheader (obfd)->e_flags =
sh_elf_get_flags_from_mach (bfd_get_mach (obfd));
"BFD_RELOC_ARM_GOTPC",
"BFD_RELOC_SH_PCDISP8BY2",
"BFD_RELOC_SH_PCDISP12BY2",
+ "BFD_RELOC_SH_IMM3",
+ "BFD_RELOC_SH_IMM3U",
+ "BFD_RELOC_SH_DISP12",
+ "BFD_RELOC_SH_DISP12BY2",
+ "BFD_RELOC_SH_DISP12BY4",
+ "BFD_RELOC_SH_DISP12BY8",
+ "BFD_RELOC_SH_DISP20",
+ "BFD_RELOC_SH_DISP20BY8",
"BFD_RELOC_SH_IMM4",
"BFD_RELOC_SH_IMM4BY2",
"BFD_RELOC_SH_IMM4BY4",
BFD_RELOC_SH_PCDISP8BY2
ENUMX
BFD_RELOC_SH_PCDISP12BY2
+ENUMX
+ BFD_RELOC_SH_IMM3
+ENUMX
+ BFD_RELOC_SH_IMM3U
+ENUMX
+ BFD_RELOC_SH_DISP12
+ENUMX
+ BFD_RELOC_SH_DISP12BY2
+ENUMX
+ BFD_RELOC_SH_DISP12BY4
+ENUMX
+ BFD_RELOC_SH_DISP12BY8
+ENUMX
+ BFD_RELOC_SH_DISP20
+ENUMX
+ BFD_RELOC_SH_DISP20BY8
ENUMX
BFD_RELOC_SH_IMM4
ENUMX
+2004-07-29 Alexandre Oliva <aoliva@redhat.com>
+
+ * readelf.c (get_machine_flags <EM_SH>): Handle EF_SH2A and
+ EF_SH2A_NOFPU.
+
2004-07-28 Alexandre Oliva <aoliva@redhat.com>
2003-07-08 Alexandre Oliva <aoliva@redhat.com>
case EF_SH5: strcat (buf, ", sh5"); break;
case EF_SH2E: strcat (buf, ", sh2e"); break;
case EF_SH4A: strcat (buf, ", sh4a"); break;
+ case EF_SH2A: strcat (buf, ", sh2a"); break;
case EF_SH4_NOFPU: strcat (buf, ", sh4-nofpu"); break;
case EF_SH4A_NOFPU: strcat (buf, ", sh4a-nofpu"); break;
+ case EF_SH2A_NOFPU: strcat (buf, ", sh2a-nofpu"); break;
default: strcat (buf, ", unknown ISA"); break;
}
+2004-07-29 Alexandre Oliva <aoliva@redhat.com>
+
+ Introduce SH2a support.
+ 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
+ * config/tc-sh.c (get_specific): Change arch_sh2a_up to
+ arch_sh2a_nofpu_up.
+ 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
+ * config/tc-sh.c (md_parse_option): Add sh2a-nofpu ISA handling.
+ 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
+ * config/tc-sh.c (sh_elf_final_processing): Move sh2a recognition
+ to end of conditional expression.
+ 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
+ * config/tc-sh.c: Add sh2a-nofpu support.
+ 2003-12-29 DJ Delorie <dj@redhat.com>
+ * tc-sh.c: Add sh2a support.
+ (parse_reg): Add tbr.
+ (parse_at): Support @@(disp,tbr).
+ (get_specific): Support sh2a opcodes.
+ (insert4): New, for 4 byte relocs.
+ (build_Mytes): Support sh2a opcodes.
+ (md_apply_fix3_Mytes): Support sh2a opcodes.
+ 2003-12-02 Michael Snyder <msnyder@redhat.com>
+ * config/tc-sh.c (md_parse_option): Handle sh2a.
+ (sh_elf_final_processing): Ditto.
+
2004-07-27 Jason Thorpe <thorpej@wasabisystems.com>
* config/tc-hppa.h (TARGET_FORMAT): Set to "elf32-hppa-netbsd"
return 3;
}
+ if (l0 == 't' && l1 == 'b' && TOLOWER (src[2]) == 'r'
+ && ! IDENT_CHAR ((unsigned char) src[3]))
+ {
+ *mode = A_TBR;
+ return 3;
+ }
if (l0 == 'm' && l1 == 'a' && TOLOWER (src[2]) == 'c'
&& ! IDENT_CHAR ((unsigned char) src[4]))
{
int len;
int mode;
src++;
- if (src[0] == '-')
+ if (src[0] == '@')
+ {
+ src = parse_at (src, op);
+ if (op->type == A_DISP_TBR)
+ op->type = A_DISP2_TBR;
+ else
+ as_bad (_("illegal double indirection"));
+ }
+ else if (src[0] == '-')
{
/* Must be predecrement. */
src++;
{
op->type = A_DISP_GBR;
}
+ else if (mode == A_TBR)
+ {
+ op->type = A_DISP_TBR;
+ }
else if (mode == A_PC)
{
/* We want @(expr, pc) to uniformly address . + expr,
sh_operand_info *user = operands + n;
sh_arg_type arg = this_try->arg[n];
+ if (SH_MERGE_ARCH_SET_VALID (valid_arch, arch_sh2a_nofpu_up)
+ && ( arg == A_DISP_REG_M
+ || arg == A_DISP_REG_N))
+ {
+ /* Check a few key IMM* fields for overflow. */
+ int opf;
+ long val = user->immediate.X_add_number;
+
+ for (opf = 0; opf < 4; opf ++)
+ switch (this_try->nibbles[opf])
+ {
+ case IMM0_4:
+ case IMM1_4:
+ if (val < 0 || val > 15)
+ goto fail;
+ break;
+ case IMM0_4BY2:
+ case IMM1_4BY2:
+ if (val < 0 || val > 15 * 2)
+ goto fail;
+ break;
+ case IMM0_4BY4:
+ case IMM1_4BY4:
+ if (val < 0 || val > 15 * 4)
+ goto fail;
+ break;
+ default:
+ break;
+ }
+ }
switch (arg)
{
case A_DISP_PC:
case A_BDISP12:
case A_BDISP8:
case A_DISP_GBR:
+ case A_DISP2_TBR:
case A_MACH:
case A_PR:
case A_MACL:
reg_n = user->reg;
break;
case A_GBR:
+ case A_TBR:
case A_SR:
case A_VBR:
case A_DSR:
reg_b = user->reg;
break;
+ case A_INC_R15:
+ if (user->type != A_INC_N)
+ goto fail;
+ if (user->reg != 15)
+ goto fail;
+ reg_n = user->reg;
+ break;
+
+ case A_DEC_R15:
+ if (user->type != A_DEC_N)
+ goto fail;
+ if (user->reg != 15)
+ goto fail;
+ reg_n = user->reg;
+ break;
+
case A_REG_M:
case A_INC_M:
case A_DEC_M:
how);
}
+static void
+insert4 (char * where, int how, int pcrel, sh_operand_info * op)
+{
+ fix_new_exp (frag_now,
+ where - frag_now->fr_literal,
+ 4,
+ & op->immediate,
+ pcrel,
+ how);
+}
static void
build_relax (sh_opcode_info *opcode, sh_operand_info *op)
{
build_Mytes (sh_opcode_info *opcode, sh_operand_info *operand)
{
int index;
- char nbuf[4];
- char *output = frag_more (2);
+ char nbuf[8];
+ char *output;
unsigned int size = 2;
int low_byte = target_big_endian ? 1 : 0;
+ int max_index = 4;
+
nbuf[0] = 0;
nbuf[1] = 0;
nbuf[2] = 0;
nbuf[3] = 0;
+ nbuf[4] = 0;
+ nbuf[5] = 0;
+ nbuf[6] = 0;
+ nbuf[7] = 0;
- for (index = 0; index < 4; index++)
+ if (SH_MERGE_ARCH_SET (opcode->arch, arch_op32))
+ {
+ output = frag_more (4);
+ size = 4;
+ max_index = 8;
+ }
+ else
+ output = frag_more (2);
+
+ for (index = 0; index < max_index; index++)
{
sh_nibble_type i = opcode->nibbles[index];
if (i < 16)
case REG_N_B01:
nbuf[index] = reg_n | 0x01;
break;
+ case IMM0_3s:
+ nbuf[index] |= 0x08;
+ case IMM0_3c:
+ insert (output + low_byte, BFD_RELOC_SH_IMM3, 0, operand);
+ break;
+ case IMM0_3Us:
+ nbuf[index] |= 0x80;
+ case IMM0_3Uc:
+ insert (output + low_byte, BFD_RELOC_SH_IMM3U, 0, operand);
+ break;
+ case DISP0_12:
+ insert (output + 2, BFD_RELOC_SH_DISP12, 0, operand);
+ break;
+ case DISP0_12BY2:
+ insert (output + 2, BFD_RELOC_SH_DISP12BY2, 0, operand);
+ break;
+ case DISP0_12BY4:
+ insert (output + 2, BFD_RELOC_SH_DISP12BY4, 0, operand);
+ break;
+ case DISP0_12BY8:
+ insert (output + 2, BFD_RELOC_SH_DISP12BY8, 0, operand);
+ break;
+ case DISP1_12:
+ insert (output + 2, BFD_RELOC_SH_DISP12, 0, operand+1);
+ break;
+ case DISP1_12BY2:
+ insert (output + 2, BFD_RELOC_SH_DISP12BY2, 0, operand+1);
+ break;
+ case DISP1_12BY4:
+ insert (output + 2, BFD_RELOC_SH_DISP12BY4, 0, operand+1);
+ break;
+ case DISP1_12BY8:
+ insert (output + 2, BFD_RELOC_SH_DISP12BY8, 0, operand+1);
+ break;
+ case IMM0_20_4:
+ break;
+ case IMM0_20:
+ insert4 (output, BFD_RELOC_SH_DISP20, 0, operand);
+ break;
+ case IMM0_20BY8:
+ insert4 (output, BFD_RELOC_SH_DISP20BY8, 0, operand);
+ break;
case IMM0_4BY4:
insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand);
break;
output[0] = (nbuf[0] << 4) | (nbuf[1]);
output[1] = (nbuf[2] << 4) | (nbuf[3]);
}
+ if (SH_MERGE_ARCH_SET (opcode->arch, arch_op32))
+ {
+ if (!target_big_endian)
+ {
+ output[3] = (nbuf[4] << 4) | (nbuf[5]);
+ output[2] = (nbuf[6] << 4) | (nbuf[7]);
+ }
+ else
+ {
+ output[2] = (nbuf[4] << 4) | (nbuf[5]);
+ output[3] = (nbuf[6] << 4) | (nbuf[7]);
+ }
+ }
return size;
}
shift = 0;
switch (fixP->fx_r_type)
{
+ case BFD_RELOC_SH_IMM3:
+ max = 0x7;
+ * buf = (* buf & 0xf8) | (val & 0x7);
+ break;
+ case BFD_RELOC_SH_IMM3U:
+ max = 0x7;
+ * buf = (* buf & 0x8f) | ((val & 0x7) << 4);
+ break;
+ case BFD_RELOC_SH_DISP12:
+ max = 0xfff;
+ buf[lowbyte] = val & 0xff;
+ buf[highbyte] |= (val >> 8) & 0x0f;
+ break;
+ case BFD_RELOC_SH_DISP12BY2:
+ max = 0xfff;
+ shift = 1;
+ buf[lowbyte] = (val >> 1) & 0xff;
+ buf[highbyte] |= (val >> 9) & 0x0f;
+ break;
+ case BFD_RELOC_SH_DISP12BY4:
+ max = 0xfff;
+ shift = 2;
+ buf[lowbyte] = (val >> 2) & 0xff;
+ buf[highbyte] |= (val >> 10) & 0x0f;
+ break;
+ case BFD_RELOC_SH_DISP12BY8:
+ max = 0xfff;
+ shift = 3;
+ buf[lowbyte] = (val >> 3) & 0xff;
+ buf[highbyte] |= (val >> 11) & 0x0f;
+ break;
+ case BFD_RELOC_SH_DISP20:
+ if (! target_big_endian)
+ abort();
+ max = 0x7ffff;
+ min = -0x80000;
+ buf[1] = (buf[1] & 0x0f) | (val >> 12) & 0xf0;
+ buf[2] = (val >> 8) & 0xff;
+ buf[3] = val & 0xff;
+ break;
+ case BFD_RELOC_SH_DISP20BY8:
+ if (!target_big_endian)
+ abort();
+ max = 0x7ffff;
+ min = -0x80000;
+ shift = 8;
+ buf[1] = (buf[1] & 0x0f) | (val >> 20) & 0xf0;
+ buf[2] = (val >> 16) & 0xff;
+ buf[3] = (val >> 8) & 0xff;
+ break;
+
case BFD_RELOC_SH_IMM4:
max = 0xf;
*buf = (*buf & 0xf0) | (val & 0xf);
+2004-07-29 Alexandre Oliva <aoliva@redhat.com>
+
+ 2003-12-30 DJ Delorie <dj@redhat.com>
+ * gas/sh/sh2a.s: New.
+ * gas/sh/sh2a.d: New.
+ * gas/sh/basic.exp: Add it.
+
2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
* gas/all/gas.exp (do_930509a): Disable test for crx.
# Test -renesas.
run_dump_test "renesas-1"
+ run_dump_test "sh2a"
}
}
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: SH2a new instructions
+#as: -isa=sh2a
+
+dump.o: file format elf32-sh
+
+Disassembly of section .text:
+0x00000000 33 79 4f ff band.b #7,@\(4095,r3\)
+0x00000004 33 79 cf ff bandnot.b #7,@\(4095,r3\)
+0x00000008 33 79 0f ff bclr.b #7,@\(4095,r3\)
+0x0000000c 86 37 bclr #7,r3
+0x0000000e 33 79 3f ff bld.b #7,@\(4095,r3\)
+0x00000012 87 3f bld #7,r3
+0x00000014 33 79 bf ff bldnot.b #7,@\(4095,r3\)
+0x00000018 33 79 5f ff bor.b #7,@\(4095,r3\)
+0x0000001c 33 79 df ff bornot.b #7,@\(4095,r3\)
+0x00000020 33 79 1f ff bset.b #7,@\(4095,r3\)
+0x00000024 86 3f bset #7,r3
+0x00000026 33 79 2f ff bst.b #7,@\(4095,r3\)
+0x0000002a 87 37 bst #7,r3
+0x0000002c 33 79 6f ff bxor.b #7,@\(4095,r3\)
+0x00000030 43 91 clips.b r3
+0x00000032 43 95 clips.w r3
+0x00000034 43 81 clipu.b r3
+0x00000036 43 85 clipu.w r3
+0x00000038 43 94 divs r0,r3
+0x0000003a 43 84 divu r0,r3
+0x0000003c 33 31 3f ff fmov.s fr3,@\(16380,r3\)
+0x00000040 33 21 3f ff fmov.d dr2,@\(32760,r3\)
+0x00000044 33 31 7f ff fmov.s @\(16380,r3\),fr3
+0x00000048 32 31 7f ff fmov.d @\(32760,r3\),dr2
+0x0000004c 43 4b jsr/n @r3
+0x0000004e 83 ff jsr/n @@\(1020,tbr\)
+0x00000050 43 e5 ldbank @r3,r0
+0x00000052 43 4a ldc r3,tbr
+0x00000054 34 31 0f ff mov.b r3,@\(4095,r4\)
+0x00000058 34 31 1f ff mov.w r3,@\(8190,r4\)
+0x0000005c 34 31 2f ff mov.l r3,@\(16380,r4\)
+0x00000060 35 41 4f ff mov.b @\(4095,r4\),r5
+0x00000064 35 41 5f ff mov.w @\(8190,r4\),r5
+0x00000068 35 41 6f ff mov.l @\(16380,r4\),r5
+0x0000006c 43 8b mov.b r0,@r3\+
+0x0000006e 43 9b mov.w r0,@r3\+
+0x00000070 43 ab mov.l r0,@r3\+
+0x00000072 43 cb mov.b @-r3,r0
+0x00000074 43 db mov.w @-r3,r0
+0x00000076 43 eb mov.l @-r3,r0
+0x00000078 03 70 ff ff movi20 #524287,r3
+0x0000007c 03 80 00 00 movi20 #-524288,r3
+0x00000080 03 71 ff ff movi20s #134217472,r3
+0x00000084 03 81 00 00 movi20s #-134217728,r3
+0x00000088 43 f1 movml.l r3,@-r15
+0x0000008a 43 f5 movml.l @r15\+,r3
+0x0000008c 43 f0 movmu.l r3,@-r15
+0x0000008e 43 f4 movmu.l @r15\+,r3
+0x00000090 03 39 movrt r3
+0x00000092 34 31 8f ff movu.b @\(4095,r3\),r4
+0x00000096 34 31 9f ff movu.w @\(8190,r3\),r4
+0x0000009a 44 80 mulr r0,r4
+0x0000009c 00 68 nott
+0x0000009e 05 83 pref @r5
+0x000000a0 00 5b resbank
+0x000000a2 00 6b rts/n
+0x000000a4 03 7b rtv/n r3
+0x000000a6 44 3c shad r3,r4
+0x000000a8 44 3d shld r3,r4
+0x000000aa 45 e1 stbank r0,@r5
+0x000000ac 04 4a stc tbr,r4
--- /dev/null
+ .text
+
+# New instructions
+
+ band.b #7,@(4095,r3)
+
+ bandnot.b #7,@(4095,r3)
+
+ bclr.b #7,@(4095,r3)
+ bclr #7,r3
+
+ bld.b #7,@(4095,r3)
+ bld #7,r3
+
+ bldnot.b #7,@(4095,r3)
+
+ bor.b #7,@(4095,r3)
+
+ bornot.b #7,@(4095,r3)
+
+ bset.b #7,@(4095,r3)
+ bset #7,r3
+
+ bst.b #7,@(4095,r3)
+ bst #7,r3
+
+ bxor.b #7,@(4095,r3)
+
+ clips.b r3
+ clips.w r3
+ clipu.b r3
+ clipu.w r3
+
+ divs r0,r3
+ divu r0,r3
+
+ fmov.s fr3,@(4095*4,r3)
+ fmov.d dr2,@(4095*8,r3)
+ fmov.s @(4095*4,r3),fr3
+ fmov.d @(4095*8,r3),dr2
+
+ jsr/n @r3
+ jsr/n @@(255*4,tbr)
+
+ ldbank @r3,r0
+
+ ldc r3,tbr
+
+ mov.b r3,@(4095,r4)
+ mov.w r3,@(4095*2,r4)
+ mov.l r3,@(4095*4,r4)
+ mov.b @(4095,r4),r5
+ mov.w @(4095*2,r4),r5
+ mov.l @(4095*4,r4),r5
+
+ mov.b r0,@r3+
+ mov.w r0,@r3+
+ mov.l r0,@r3+
+ mov.b @-r3,r0
+ mov.w @-r3,r0
+ mov.l @-r3,r0
+
+ movi20 #524287,r3
+ movi20 #-524288,r3
+ movi20s #524287*256,r3
+ movi20s #-524288*256,r3
+
+ movml.l r3,@-r15
+ movml.l @r15+,r3
+
+ movmu.l r3,@-r15
+ movmu.l @r15+,r3
+
+ movrt r3
+
+ movu.b @(4095,r3),r4
+ movu.w @(4095*2,r3),r4
+
+ mulr r0,r4
+
+ nott
+
+ pref @r5
+
+ resbank
+
+ rts/n
+
+ rtv/n r3
+
+ shad r3,r4
+ shld r3,r4
+
+ stbank r0,@r5
+
+ stc tbr,r4
+2004-07-29 Alexandre Oliva <aoliva@redhat.com>
+
+ Introduce SH2a support.
+ 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
+ * sh.h (EF_SH2A_NOFPU): New.
+ 2003-12-01 Michael Snyder <msnyder@redhat.com>
+ * sh.h (EF_SH2A): New.
+
2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
* crx.h: Add BFD_RELOC_CRX_SWITCH8, BFD_RELOC_CRX_SWITCH16,
#define EF_SH4 9
#define EF_SH2E 11
#define EF_SH4A 12
+#define EF_SH2A 13
#define EF_SH4_NOFPU 16
#define EF_SH4A_NOFPU 17
#define EF_SH4_NOMMU_NOFPU 18
+#define EF_SH2A_NOFPU 19
#define EF_SH3_NOMMU 20
/* This one can only mix in objects from other EF_SH5 objects. */
/* EF_SH5 */ 0, \
/* EF_SH2E */ bfd_mach_sh2e , \
/* EF_SH4A */ bfd_mach_sh4a , \
-/* 13, 14, 15 */ 0, 0, 0, \
+/* EF_SH2A */ bfd_mach_sh2a , \
+/* 14, 15 */ 0, 0, \
/* EF_SH4_NOFPU */ bfd_mach_sh4_nofpu , \
/* EF_SH4A_NOFPU */ bfd_mach_sh4a_nofpu , \
/* EF_SH4_NOMMU_NOFPU */ bfd_mach_sh4_nommu_nofpu, \
-/* 19 */ 0, \
+/* EF_SH2A_NOFPU */ bfd_mach_sh2a_nofpu , \
/* EF_SH3_NOMMU */ bfd_mach_sh3_nommu
/* Convert arch_sh* into EF_SH*. */
projects / binutils-gdb.git / commitdiff