the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
-
#include "config.h"
#include "system.h"
fixing up each insn, and generating the new insns to copy values
into the reload registers. */
-
#ifndef REGISTER_MOVE_COST
#define REGISTER_MOVE_COST(x, y) 2
#endif
rtx to_rtx; /* REG rtx for the replacement. */
};
-static struct elim_table * reg_eliminate = 0;
+static struct elim_table *reg_eliminate = 0;
/* This is an intermediate structure to initialize the table. It has
- exactly the members provided by ELIMINABLE_REGS. */
+ exactly the members provided by ELIMINABLE_REGS. */
static struct elim_table_1
{
int from;
const PTR r1p;
const PTR r2p;
{
- register int r1 = *(const short *)r1p, r2 = *(const short *)r2p;
+ register int r1 = *(const short *) r1p, r2 = *(const short *) r2p;
register int t;
/* Consider required reloads before optional ones. */
if (r < 0)
abort ();
-
+
spill_add_cost[r] += n_refs;
nregs = HARD_REGNO_NREGS (r, PSEUDO_REGNO_MODE (reg));
if (x == 0)
return;
-
+
code = GET_CODE (x);
if (code == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
ep->can_eliminate = 0;
return;
}
-
+
fmt = GET_RTX_FORMAT (code);
for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++)
{
process it since it won't be used unless something changes. */
if (replace)
{
- delete_dead_insn (insn);
+ delete_dead_insn (insn);
return 1;
}
val = 1;
for (i = 0; i < recog_data.n_dups; i++)
*recog_data.dup_loc[i]
- = *recog_data.operand_loc[(int)recog_data.dup_num[i]];
+ = *recog_data.operand_loc[(int) recog_data.dup_num[i]];
/* If any eliminable remain, they aren't eliminable anymore. */
check_eliminable_occurrences (old_body);
for (i = 0; i < recog_data.n_operands; i++)
*recog_data.operand_loc[i] = substed_operand[i];
for (i = 0; i < recog_data.n_dups; i++)
- *recog_data.dup_loc[i] = substed_operand[(int)recog_data.dup_num[i]];
+ *recog_data.dup_loc[i] = substed_operand[(int) recog_data.dup_num[i]];
/* If we are replacing a body that was a (set X (plus Y Z)), try to
re-recognize the insn. We do this in case we had a simple addition
If re-recognition fails, the old insn code number will still be used,
and some register operands may have changed into PLUS expressions.
These will be handled by find_reloads by loading them into a register
- again.*/
+ again. */
if (val)
{
for (i = 0; i < recog_data.n_operands; i++)
*recog_data.operand_loc[i] = orig_operand[i];
for (i = 0; i < recog_data.n_dups; i++)
- *recog_data.dup_loc[i] = orig_operand[(int)recog_data.dup_num[i]];
+ *recog_data.dup_loc[i] = orig_operand[(int) recog_data.dup_num[i]];
}
/* Update all elimination pairs to reflect the status after the current
if (!reg_eliminate)
reg_eliminate = (struct elim_table *)
- xcalloc(sizeof(struct elim_table), NUM_ELIMINABLE_REGS);
+ xcalloc (sizeof (struct elim_table), NUM_ELIMINABLE_REGS);
/* Does this function require a frame pointer? */
else if (fmt[i] == 'E')
{
register int j;
- for (j = XVECLEN (x, i) - 1; j >=0; j--)
+ for (j = XVECLEN (x, i) - 1; j >= 0; j--)
scan_paradoxical_subregs (XVECEXP (x, i, j));
}
}
reg_has_output_reload[REGNO (XEXP (in_reg, 0))] = 1;
}
else
- forget_old_reloads_1 (XEXP (in_reg, 0), NULL_RTX,
+ forget_old_reloads_1 (XEXP (in_reg, 0), NULL_RTX,
NULL);
}
else if ((code == PRE_INC || code == PRE_DEC)
/* Earlyclobbered outputs must conflict with inputs. */
if (earlyclobber_operand_p (rld[i].out))
time2 = MAX_RECOG_OPERANDS * 4 + 3;
-
+
break;
}
time2 = 1;
if (count < n_spills)
break;
}
-
+
/* We should have found a spill register by now. */
if (count >= n_spills)
return 0;
{
max_group_size = MAX (rld[j].nregs, max_group_size);
group_class
- = reg_class_superunion[(int)rld[j].class][(int)group_class];
+ = reg_class_superunion[(int) rld[j].class][(int)group_class];
}
save_reload_reg_rtx[j] = rld[j].reg_rtx;
#ifdef CLASS_CANNOT_CHANGE_MODE
(TEST_HARD_REG_BIT
(reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE], i)
- ? ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (last_reg),
+ ? ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (last_reg),
need_mode)
: (GET_MODE_SIZE (GET_MODE (last_reg))
>= GET_MODE_SIZE (need_mode)))
{
/* If a group is needed, verify that all the subsequent
registers still have their values intact. */
- int nr
- = HARD_REGNO_NREGS (i, rld[r].mode);
+ int nr = HARD_REGNO_NREGS (i, rld[r].mode);
int k;
for (k = 1; k < nr; k++)
&& rld[r].out
&& ! TEST_HARD_REG_BIT (reg_reloaded_dead, i))
/* Don't clobber the frame pointer. */
- || (i == HARD_FRAME_POINTER_REGNUM && rld[r].out)
+ || (i == HARD_FRAME_POINTER_REGNUM
+ && rld[r].out)
/* Don't really use the inherited spill reg
if we need it wider than we've got it. */
|| (GET_MODE_SIZE (rld[r].mode)
case RELOAD_FOR_INPUT:
case RELOAD_FOR_OPERAND_ADDRESS:
reload_override_in[r] = equiv;
- /* Fall through. */
+ /* Fall through. */
default:
equiv = 0;
break;
if (rld[r].reg_rtx != 0 || rld[r].optional != 0)
continue;
-#if 0 /* No longer needed for correct operation. Might or might not
- give better code on the average. Want to experiment? */
+#if 0
+ /* No longer needed for correct operation. Might or might
+ not give better code on the average. Want to experiment? */
/* See if there is a later reload that has a class different from our
class that intersects our class or that requires less register
}
}
}
-
\f
/* These arrays are filled by emit_reload_insns and its subroutines. */
static rtx input_reload_insns[MAX_RECOG_OPERANDS];
rtx set;
/* Don't output the last reload if OLD is not the dest of
- INSN and is in the src and is clobbered by INSN. */
+ INSN and is in the src and is clobbered by INSN. */
if (! flag_expensive_optimizations
|| GET_CODE (old) != REG
|| !(set = single_set (insn))
register, the secondary reload does the actual
store. */
if (s >= 0 && set == NULL_RTX)
- ; /* We can't tell what function the secondary reload
- has and where the actual store to the pseudo is
- made; leave new_spill_reg_store alone. */
+ /* We can't tell what function the secondary reload
+ has and where the actual store to the pseudo is
+ made; leave new_spill_reg_store alone. */
+ ;
else if (s >= 0
&& SET_SRC (set) == rl->reg_rtx
&& SET_DEST (set) == rld[s].reg_rtx)
else
output_reload_insns[rl->opnum] = get_insns ();
- end_sequence ();
+ end_sequence ();
}
/* Do input reloading for reload RL, which is for the insn described by CHAIN
{
expect_occurrences
= count_occurrences (PATTERN (insn), rl->in, 0) == 1 ? 0 : -1;
- rl->in
- = regno_reg_rtx[reg_reloaded_contents[reload_spill_index[j]]];
+ rl->in = regno_reg_rtx[reg_reloaded_contents[reload_spill_index[j]]];
}
/* If we are reloading a register that was recently stored in with an
if (i >= 0 && rld[r].reg_rtx != 0)
{
- int nr
- = HARD_REGNO_NREGS (i, GET_MODE (rld[r].reg_rtx));
+ int nr = HARD_REGNO_NREGS (i, GET_MODE (rld[r].reg_rtx));
int k;
int part_reaches_end = 0;
int all_reaches_end = 1;
}
else
{
- int num_regs = HARD_REGNO_NREGS (nregno,GET_MODE (rld[r].out));
+ int num_regs = HARD_REGNO_NREGS (nregno, GET_MODE (rld[r].out));
while (num_regs-- > 0)
reg_last_reload_reg[nregno + num_regs] = 0;
|| ! rtx_equal_p (dst, XEXP (SET_SRC (set), 0))
|| ! rtx_equal_p (dst, XEXP (SET_SRC (set2), 0))
|| (INTVAL (XEXP (SET_SRC (set), 1))
- != - INTVAL (XEXP (SET_SRC (set2), 1))))
+ != -INTVAL (XEXP (SET_SRC (set2), 1))))
return;
delete_insn (prev);
delete_insn (next);
if (code != REG)
{
- const char *fmt= GET_RTX_FORMAT (code);
+ const char *fmt = GET_RTX_FORMAT (code);
for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
{
if (fmt[i] == 'e')
delete_address_reloads_1 (dead_insn, XEXP (x, i), current_insn);
else if (fmt[i] == 'E')
{
- for (j = XVECLEN (x, i) - 1; j >=0; j--)
+ for (j = XVECLEN (x, i) - 1; j >= 0; j--)
delete_address_reloads_1 (dead_insn, XVECEXP (x, i, j),
current_insn);
}
reg_last_reload_reg[REGNO (incloc)] = 0;
if (GET_CODE (value) == PRE_DEC || GET_CODE (value) == POST_DEC)
- inc_amount = - inc_amount;
+ inc_amount = -inc_amount;
inc = GEN_INT (inc_amount);
{
rtx insn;
- cselib_init ();
+ cselib_init ();
init_alias_analysis ();
for (insn = first; insn; insn = NEXT_INSN (insn))
|| (this_cost == old_cost
&& GET_CODE (l->loc) == REG
&& GET_CODE (SET_SRC (set)) != REG))
- && validate_change (insn, &SET_SRC (set), copy_rtx (l->loc), 1))
+ && validate_change (insn, &SET_SRC (set), copy_rtx (l->loc), 1))
old_cost = this_cost, did_change = 1;
}
reload_cse_simplify_operands (insn)
rtx insn;
{
- int i,j;
+ int i, j;
/* For each operand, all registers that are equivalent to it. */
HARD_REG_SET equiv_regs[MAX_RECOG_OPERANDS];
/* Figure out which alternative currently matches. */
if (! constrain_operands (1))
fatal_insn_not_found (insn);
-
+
alternative_reject = (int *) alloca (recog_data.n_alternatives * sizeof (int));
alternative_nregs = (int *) alloca (recog_data.n_alternatives * sizeof (int));
alternative_order = (int *) alloca (recog_data.n_alternatives * sizeof (int));
/* See if REGNO fits this alternative, and set it up as the
replacement register if we don't have one for this
alternative yet and the operand being replaced is not
- a cheap CONST_INT. */
+ a cheap CONST_INT. */
if (op_alt_regno[i][j] == -1
&& reg_fits_class_p (reg, class, 0, mode)
&& (GET_CODE (recog_data.operand[i]) != CONST_INT
if (reg_state[regno].offset != const0_rtx)
/* Previous REG_EQUIV / REG_EQUAL notes for PREV
are now invalid. */
- for (np = ®_NOTES (prev); *np; )
+ for (np = ®_NOTES (prev); *np;)
{
if (REG_NOTE_KIND (*np) == REG_EQUAL
|| REG_NOTE_KIND (*np) == REG_EQUIV)
}
}
- note_stores (PATTERN (insn), reload_combine_note_store, NULL);
+ note_stores (PATTERN (insn), reload_combine_note_store, NULL);
if (GET_CODE (insn) == CALL_INSN)
{
case PLUS:
/* We are interested in (plus (reg) (const_int)) . */
- if (GET_CODE (XEXP (x, 0)) != REG || GET_CODE (XEXP (x, 1)) != CONST_INT)
+ if (GET_CODE (XEXP (x, 0)) != REG
+ || GET_CODE (XEXP (x, 1)) != CONST_INT)
break;
offset = XEXP (x, 1);
x = XEXP (x, 0);
rtx insn;
int last_label_luid;
- for (i = FIRST_PSEUDO_REGISTER-1; i >= 0; i--)
+ for (i = FIRST_PSEUDO_REGISTER - 1; i >= 0; i--)
reg_set_luid[i] = 0;
last_label_luid = 0;
unknown values. */
if (GET_CODE (insn) == CALL_INSN)
{
- for (i = FIRST_PSEUDO_REGISTER-1; i >= 0; i--)
+ for (i = FIRST_PSEUDO_REGISTER - 1; i >= 0; i--)
{
if (call_used_regs[i])
{
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