+2018-01-24 Renlin Li <renlin.li@arm.com>
+
+ * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Add support for
+ BFD_RELOC_AARCH64_MOVW_PREL_G0, BFD_RELOC_AARCH64_MOVW_PREL_G0_NC,
+ BFD_RELOC_AARCH64_MOVW_PREL_G1, BFD_RELOC_AARCH64_MOVW_PREL_G1_NC,
+ BFD_RELOC_AARCH64_MOVW_PREL_G2, BFD_RELOC_AARCH64_MOVW_PREL_G2_NC,
+ BFD_RELOC_AARCH64_MOVW_PREL_G3.
+ * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
+ (_bfd_aarch64_elf_resolve_relocation): Likewise.
+
2018-01-24 Renlin Li <renlin.li@arm.com>
* reloc.c: Add BFD_RELOC_AARCH64_MOVW_PREL_G0,
case BFD_RELOC_AARCH64_ADR_HI21_PCREL:
case BFD_RELOC_AARCH64_ADR_LO21_PCREL:
case BFD_RELOC_AARCH64_LD_LO19_PCREL:
+ case BFD_RELOC_AARCH64_MOVW_PREL_G0:
+ case BFD_RELOC_AARCH64_MOVW_PREL_G0_NC:
+ case BFD_RELOC_AARCH64_MOVW_PREL_G1:
+ case BFD_RELOC_AARCH64_MOVW_PREL_G1_NC:
+ case BFD_RELOC_AARCH64_MOVW_PREL_G2:
+ case BFD_RELOC_AARCH64_MOVW_PREL_G2_NC:
+ case BFD_RELOC_AARCH64_MOVW_PREL_G3:
if (bfd_link_pic (info)
&& (input_section->flags & SEC_ALLOC) != 0
&& (input_section->flags & SEC_READONLY) != 0
case BFD_RELOC_AARCH64_MOVW_G0_S:
case BFD_RELOC_AARCH64_MOVW_G1_S:
case BFD_RELOC_AARCH64_MOVW_G2_S:
+ case BFD_RELOC_AARCH64_MOVW_PREL_G0:
+ case BFD_RELOC_AARCH64_MOVW_PREL_G1:
+ case BFD_RELOC_AARCH64_MOVW_PREL_G2:
+ case BFD_RELOC_AARCH64_MOVW_PREL_G3:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2:
case BFD_RELOC_AARCH64_MOVW_G3:
case BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC:
case BFD_RELOC_AARCH64_MOVW_GOTOFF_G1:
+ case BFD_RELOC_AARCH64_MOVW_PREL_G0_NC:
+ case BFD_RELOC_AARCH64_MOVW_PREL_G1_NC:
+ case BFD_RELOC_AARCH64_MOVW_PREL_G2_NC:
case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
case BFD_RELOC_AARCH64_ADR_LO21_PCREL:
case BFD_RELOC_AARCH64_BRANCH19:
case BFD_RELOC_AARCH64_LD_LO19_PCREL:
+ case BFD_RELOC_AARCH64_MOVW_PREL_G0:
+ case BFD_RELOC_AARCH64_MOVW_PREL_G0_NC:
+ case BFD_RELOC_AARCH64_MOVW_PREL_G1:
+ case BFD_RELOC_AARCH64_MOVW_PREL_G1_NC:
+ case BFD_RELOC_AARCH64_MOVW_PREL_G2:
+ case BFD_RELOC_AARCH64_MOVW_PREL_G2_NC:
+ case BFD_RELOC_AARCH64_MOVW_PREL_G3:
case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
+2018-01-24 Renlin Li <renlin.li@arm.com>
+
+ * testsuite/ld-aarch64/aarch64-elf.exp: Run new testes.
+ * testsuite/ld-aarch64/emit-relocs-287.s: Fix test case.
+ * testsuite/ld-aarch64/emit-relocs-287.d: Fix expected output.
+ * testsuite/ld-aarch64/emit-relocs-287-overflow.s: New.
+ * testsuite/ld-aarch64/emit-relocs-287-overflow.d: New.
+ * testsuite/ld-aarch64/emit-relocs-288.d: New.
+ * testsuite/ld-aarch64/emit-relocs-288.s: New.
+ * testsuite/ld-aarch64/emit-relocs-289.d: New.
+ * testsuite/ld-aarch64/emit-relocs-289.s: New.
+ * testsuite/ld-aarch64/emit-relocs-289-overflow.s: New.
+ * testsuite/ld-aarch64/emit-relocs-289-overflow.d: New.
+ * testsuite/ld-aarch64/emit-relocs-290.d: New.
+ * testsuite/ld-aarch64/emit-relocs-290.s: New.
+ * testsuite/ld-aarch64/emit-relocs-291.d: New.
+ * testsuite/ld-aarch64/emit-relocs-291.s: New.
+ * testsuite/ld-aarch64/emit-relocs-291-overflow.s: New.
+ * testsuite/ld-aarch64/emit-relocs-291-overflow.d: New.
+ * testsuite/ld-aarch64/emit-relocs-292.d: New.
+ * testsuite/ld-aarch64/emit-relocs-292.s: New.
+ * testsuite/ld-aarch64/emit-relocs-293.d: New.
+ * testsuite/ld-aarch64/emit-relocs-293.s: New.
+
2018-01-20 H.J. Lu <hongjiu.lu@intel.com>
PR ld/22721
run_dump_test_lp64 "emit-relocs-285"
run_dump_test_lp64 "emit-relocs-286"
run_dump_test_lp64 "emit-relocs-286-bad"
-# 287-298 are not done yet
+run_dump_test_lp64 "emit-relocs-287"
+run_dump_test_lp64 "emit-relocs-287-overflow"
+run_dump_test_lp64 "emit-relocs-288"
+run_dump_test_lp64 "emit-relocs-289"
+run_dump_test_lp64 "emit-relocs-289-overflow"
+run_dump_test_lp64 "emit-relocs-290"
+run_dump_test_lp64 "emit-relocs-291"
+run_dump_test_lp64 "emit-relocs-291-overflow"
+run_dump_test_lp64 "emit-relocs-292"
+run_dump_test_lp64 "emit-relocs-293"
+# 294-298 are not done yet
run_dump_test_lp64 "emit-relocs-299"
# 300 is not done yet
run_dump_test_lp64 "emit-relocs-301"
--- /dev/null
+#source: emit-relocs-287-overflow.s
+#ld: -T relocs.ld --defsym tempy=0x20000 --defsym tempy2=0x0 -e0 --emit-relocs
+#objdump: -dr
+#error: .*\(.text\+0x\d+\): relocation truncated to fit: R_AARCH64_MOVW_PREL_G0 against symbol `tempy' .*
+#error: .*\(.text\+0x\d+\): relocation truncated to fit: R_AARCH64_MOVW_PREL_G0 against symbol `tempy2' .*
--- /dev/null
+.comm gempy,4,4
+.text
+
+ movz x4, :prel_g0:tempy
+ movz x4, :prel_g0:tempy2
#source: emit-relocs-287.s
-#ld: -T relocs.ld --defsym tempy=0x11000 --defsym tempy2=0x45000 --defsym tempy3=0x1234 --defsym _GOT_=0x10000 -e0 --emit-relocs
+#ld: -T relocs.ld --defsym tempy=0x1ffff --defsym tempy2=0x4 -e0 --emit-relocs
#objdump: -dr
#...
- +10000: 8a000000 and x0, x0, x0
- +10004: 92400000 and x0, x0, #0x1
- +10008: d2820004 movz x4, #0x1000
- +10008: R_AARCH64_MOVW_PREL_G0 _GOT_
- +1000c: d28a0007 movz x7, #0x5000
- +1000c: R_AARCH64_MOVW_PREL_G0 _GOT_
- +10010: d2824691 movz x17, #0x1234
- +10010: R_AARCH64_MOVW_PREL_G0 _GOT_
+ +10000: d29fffe4 mov x4, #0xffff // #65535
+ 10000: R_AARCH64_MOVW_PREL_G0 tempy
+ +10004: 929ffff1 mov x17, #0xffffffffffff0000 // #-65536
+ 10004: R_AARCH64_MOVW_PREL_G0 tempy2
.comm gempy,4,4
.text
-
- and x0,x0,x0
- and x0,x0,#0x1
- movz x4, :prel_g0:tempy
- movz x7, :prel_g0:tempy2
- movz x17, :prel_g0:tempy3
+ movz x4, :prel_g0:tempy
+ movz x17, :prel_g0:tempy2
--- /dev/null
+#source: emit-relocs-288.s
+#ld: -T relocs.ld --defsym tempy=0x1ffff --defsym tempy2=0x20000 --defsym tempy3=0x0 -e0 --emit-relocs
+#objdump: -dr
+
+#...
+ +10000: f29fffe4 movk x4, #0xffff
+ 10000: R_AARCH64_MOVW_PREL_G0_NC tempy
+ +10004: f29fff87 movk x7, #0xfffc
+ 10004: R_AARCH64_MOVW_PREL_G0_NC tempy2
+ +10008: f29fff11 movk x17, #0xfff8
+ 10008: R_AARCH64_MOVW_PREL_G0_NC tempy3
--- /dev/null
+.comm gempy,4,4
+.text
+ movk x4, :prel_g0_nc:tempy
+ movk x7, :prel_g0_nc:tempy2
+ movk x17, :prel_g0_nc:tempy3
--- /dev/null
+#source: emit-relocs-289-overflow.s
+#ld: -T relocs.ld --defsym tempy=0x1100000000 -e0 --emit-relocs
+#objdump: -dr
+#error: .*\(.text\+0x\d+\): relocation truncated to fit: R_AARCH64_MOVW_PREL_G1 against symbol `tempy' .*
--- /dev/null
+.comm gempy,4,4
+.text
+
+ movz x4, :prel_g1:tempy
--- /dev/null
+#source: emit-relocs-289.s
+#ld: -Ttext 0x100000000 --defsym tempy=0x1ffffffff --defsym tempy2=0x4 -e0 --emit-relocs
+#objdump: -dr
+
+#...
+ +100000000: d2bfffe4 mov x4, #0xffff0000 // #4294901760
+ 100000000: R_AARCH64_MOVW_PREL_G1 tempy
+ +100000004: 92bffff1 mov x17, #0xffffffff0000ffff // #-4294901761
+ 100000004: R_AARCH64_MOVW_PREL_G1 tempy2
+
--- /dev/null
+.comm gempy,4,4
+.text
+ movz x4, :prel_g1:tempy
+ movz x17, :prel_g1:tempy2
--- /dev/null
+#source: emit-relocs-290.s
+#ld: -Ttext=0x100000000 --defsym tempy=0x200000000 --defsym tempy2=0x1ffff0000 --defsym tempy3=0x8 -e0 --emit-relocs
+#objdump: -dr
+
+#...
+ +100000000: f2a00004 movk x4, #0x0, lsl #16
+ 100000000: R_AARCH64_MOVW_PREL_G1_NC tempy
+ +100000004: f2bfffc7 movk x7, #0xfffe, lsl #16
+ 100000004: R_AARCH64_MOVW_PREL_G1_NC tempy2
+ +100000008: f2a00011 movk x17, #0x0, lsl #16
+ 100000008: R_AARCH64_MOVW_PREL_G1_NC tempy3
--- /dev/null
+.comm gempy,4,4
+.text
+ movk x4, :prel_g1_nc:tempy
+ movk x7, :prel_g1_nc:tempy2
+ movk x17, :prel_g1_nc:tempy3
--- /dev/null
+#source: emit-relocs-291-overflow.s
+#ld: -T relocs.ld --defsym tempy=0x10000000000000 -e0 --emit-relocs
+#objdump: -dr
+#error: .*\(.text\+0x\d+\): relocation truncated to fit: R_AARCH64_MOVW_PREL_G2 against symbol `tempy' .*
--- /dev/null
+.comm gempy,4,4
+.text
+
+ movz x4, :prel_g2:tempy
--- /dev/null
+#source: emit-relocs-291.s
+#ld: -Ttext 0x1000000000000 --defsym tempy=0x1ffffffffffff --defsym tempy2=0x1ffff00000000 -defsym tempy3=0x8 -e0 --emit-relocs
+#objdump: -dr
+
+#...
+ +1000000000000: d2dfffe4 mov x4, #0xffff00000000 // #281470681743360
+ 1000000000000: R_AARCH64_MOVW_PREL_G2 tempy
+ +1000000000004: d2dfffc7 mov x7, #0xfffe00000000 // #281466386776064
+ 1000000000004: R_AARCH64_MOVW_PREL_G2 tempy2
+ +1000000000008: 92dffff1 mov x17, #0xffff0000ffffffff // #-281470681743361
+ 1000000000008: R_AARCH64_MOVW_PREL_G2 tempy3
--- /dev/null
+.comm gempy,4,4
+.text
+ movz x4, :prel_g2:tempy
+ movz x7, :prel_g2:tempy2
+ movz x17, :prel_g2:tempy3
--- /dev/null
+#source: emit-relocs-292.s
+#ld: -Ttext 0x1000000000000 --defsym tempy=0x2000000000000 --defsym tempy2=0x1ffff00000004 --defsym tempy3=0x4 -e0 --emit-relocs
+#objdump: -dr
+
+#...
+ +1000000000000: f2c00004 movk x4, #0x0, lsl #32
+ 1000000000000: R_AARCH64_MOVW_PREL_G2_NC tempy
+ +1000000000004: f2dfffe7 movk x7, #0xffff, lsl #32
+ 1000000000004: R_AARCH64_MOVW_PREL_G2_NC tempy2
+ +1000000000008: f2dffff1 movk x17, #0xffff, lsl #32
+ 1000000000008: R_AARCH64_MOVW_PREL_G2_NC tempy3
--- /dev/null
+.comm gempy,4,4
+.text
+
+ movk x4, :prel_g2_nc:tempy
+ movk x7, :prel_g2_nc:tempy2
+ movk x17, :prel_g2_nc:tempy3
--- /dev/null
+#source: emit-relocs-293.s
+#ld: -Ttext 0x1000000000000 --defsym tempy=0x2000000000000000 --defsym tempy2=0x8 -e0 --emit-relocs
+#objdump: -dr
+
+#...
+ +1000000000000: d2e3ffe4 mov x4, #0x1fff000000000000 // #2305561534236983296
+ 1000000000000: R_AARCH64_MOVW_PREL_G3 tempy
+ +1000000000004: 92e00007 movn x7, #0x0, lsl #48
+ 1000000000004: R_AARCH64_MOVW_PREL_G3 tempy2
--- /dev/null
+.comm gempy,4,4
+.text
+
+ movz x4, :prel_g3:tempy
+ movz x7, :prel_g3:tempy2