aco: ensure correct bit representation of subdword constants
authorDaniel Schürmann <daniel@schuermann.dev>
Tue, 7 Apr 2020 09:37:25 +0000 (10:37 +0100)
committerMarge Bot <eric+marge@anholt.net>
Fri, 10 Apr 2020 07:19:27 +0000 (07:19 +0000)
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4492>

src/amd/compiler/aco_instruction_selection.cpp

index 711c64bcea8cbfd00c3e3580a138a6983fb2c913..7c88d0d75a6c93cebd27530fb36ca314b39c43a5 100644 (file)
@@ -3086,6 +3086,12 @@ void visit_load_const(isel_context *ctx, nir_load_const_instr *instr)
       int val = instr->value[0].b ? -1 : 0;
       Operand op = bld.lm.size() == 1 ? Operand((uint32_t) val) : Operand((uint64_t) val);
       bld.sop1(Builder::s_mov, Definition(dst), op);
+   } else if (instr->def.bit_size == 8) {
+      /* ensure that the value is correctly represented in the low byte of the register */
+      bld.sopk(aco_opcode::s_movk_i32, Definition(dst), instr->value[0].u8);
+   } else if (instr->def.bit_size == 16) {
+      /* ensure that the value is correctly represented in the low half of the register */
+      bld.sopk(aco_opcode::s_movk_i32, Definition(dst), instr->value[0].u16);
    } else if (dst.size() == 1) {
       bld.copy(Definition(dst), Operand(instr->value[0].u32));
    } else {