i386.md (add?f3, [...]): Enable for TARGET_SSE(2) too.

	* i386.md (add?f3, sub?f3, mul?f3, dif?f3): Enable for TARGET_SSE(2)
	too.
	(fop_sf_comm, fop_df_comm, fop_sf_1, fop_df_1): Support SSE.
	(fop_sf_comm_sse, fop_df_comm_sse): New patterns.
	(fop_sf_1_sse, fop_df_1_sse): New patterns
	(fop_*): Disable float_extend and float patterns for SSE compilation.
	* i386.c (output_387_binary_op): Support SSE.

From-SVN: r39635

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index c8fec55a11f82a5ae9134145f43e3c796917cf57..a5bdf0591cd28eca49197effae9da41572cecfae 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,13 @@
+Tue Feb 13 14:53:16 CET 2001  Jan Hubicka  <jh@suse.cz>
+
+       * i386.md (add?f3, sub?f3, mul?f3, dif?f3): Enable for TARGET_SSE(2)
+       too.
+       (fop_sf_comm, fop_df_comm, fop_sf_1, fop_df_1): Support SSE.
+       (fop_sf_comm_sse, fop_df_comm_sse): New patterns.
+       (fop_sf_1_sse, fop_df_1_sse): New patterns
+       (fop_*): Disable float_extend and float patterns for SSE compilation.
+       * i386.c (output_387_binary_op): Support SSE.
+
 Tue Feb 13 14:16:34 CET 2001  Jan Hubicka  <jh@suse.cz>
 
        * i386.md (dummy_extendsfdf2): Support SSE2

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 84e11b5fec87afd72323eb6cdb4a16a9f2ee4fa6..bb4d421ed2d7c6e35ecc8fc6e309e04c43af58d5 100644 (file)
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -3762,6 +3762,8 @@ output_387_binary_op (insn, operands)
 {
   static char buf[30];
   const char *p;
+  const char *ssep;
+  int is_sse = SSE_REG_P (operands[0]) | SSE_REG_P (operands[1]) | SSE_REG_P (operands[2]);
 
 #ifdef ENABLE_CHECKING
   /* Even if we do not want to check the inputs, this documents input
@@ -3775,7 +3777,7 @@ output_387_binary_op (insn, operands)
              && (STACK_REG_P (operands[1]) || GET_CODE (operands[1]) == MEM)))
       && (STACK_TOP_P (operands[1]) || STACK_TOP_P (operands[2])))
     ; /* ok */
-  else
+  else if (!is_sse)
     abort ();
 #endif
 
@@ -3787,6 +3789,7 @@ output_387_binary_op (insn, operands)
        p = "fiadd";
       else
        p = "fadd";
+      ssep = "add";
       break;
 
     case MINUS:
@@ -3795,6 +3798,7 @@ output_387_binary_op (insn, operands)
        p = "fisub";
       else
        p = "fsub";
+      ssep = "sub";
       break;
 
     case MULT:
@@ -3803,6 +3807,7 @@ output_387_binary_op (insn, operands)
        p = "fimul";
       else
        p = "fmul";
+      ssep = "mul";
       break;
 
     case DIV:
@@ -3811,12 +3816,22 @@ output_387_binary_op (insn, operands)
        p = "fidiv";
       else
        p = "fdiv";
+      ssep = "div";
       break;
 
     default:
       abort ();
     }
 
+  if (is_sse)
+   {
+      strcpy (buf, ssep);
+      if (GET_MODE (operands[0]) == SFmode)
+       strcat (buf, "ss\t{%2, %0|%0, %2}");
+      else
+       strcat (buf, "sd\t{%2, %0|%0, %2}");
+      return buf;
+   }
   strcpy (buf, p);
 
   switch (GET_CODE (operands[3]))

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index cf2f931b000f77021da676ecfdff4cbd8282e71a..25718838b768927e01fcd4b5edaabd89f7148b0b 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -5459,14 +5459,14 @@
   [(set (match_operand:DF 0 "register_operand" "")
        (plus:DF (match_operand:DF 1 "register_operand" "")
                 (match_operand:DF 2 "nonimmediate_operand" "")))]
-  "TARGET_80387"
+  "TARGET_80387 || TARGET_SSE2"
   "")
 
 (define_expand "addsf3"
   [(set (match_operand:SF 0 "register_operand" "")
        (plus:SF (match_operand:SF 1 "register_operand" "")
                 (match_operand:SF 2 "nonimmediate_operand" "")))]
-  "TARGET_80387"
+  "TARGET_80387 || TARGET_SSE"
   "")
 \f
 ;; Subtract instructions
@@ -5664,14 +5664,14 @@
   [(set (match_operand:DF 0 "register_operand" "")
        (minus:DF (match_operand:DF 1 "register_operand" "")
                  (match_operand:DF 2 "nonimmediate_operand" "")))]
-  "TARGET_80387"
+  "TARGET_80387 || TARGET_SSE2"
   "")
 
 (define_expand "subsf3"
   [(set (match_operand:SF 0 "register_operand" "")
        (minus:SF (match_operand:SF 1 "register_operand" "")
                  (match_operand:SF 2 "nonimmediate_operand" "")))]
-  "TARGET_80387"
+  "TARGET_80387 || TARGET_SSE"
   "")
 \f
 ;; Multiply instructions
@@ -5845,14 +5845,14 @@
   [(set (match_operand:DF 0 "register_operand" "")
        (mult:DF (match_operand:DF 1 "register_operand" "")
                 (match_operand:DF 2 "nonimmediate_operand" "")))]
-  "TARGET_80387"
+  "TARGET_80387 || TARGET_SSE2"
   "")
 
 (define_expand "mulsf3"
   [(set (match_operand:SF 0 "register_operand" "")
        (mult:SF (match_operand:SF 1 "register_operand" "")
                 (match_operand:SF 2 "nonimmediate_operand" "")))]
-  "TARGET_80387"
+  "TARGET_80387 || TARGET_SSE"
   "")
 \f
 ;; Divide instructions
@@ -5899,14 +5899,14 @@
   [(set (match_operand:DF 0 "register_operand" "")
        (div:DF (match_operand:DF 1 "register_operand" "")
                (match_operand:DF 2 "nonimmediate_operand" "")))]
-   "TARGET_80387"
+   "TARGET_80387 || TARGET_SSE2"
    "")
  
 (define_expand "divsf3"
   [(set (match_operand:SF 0 "register_operand" "")
        (div:SF (match_operand:SF 1 "register_operand" "")
                (match_operand:SF 2 "nonimmediate_operand" "")))]
-  "TARGET_80387"
+  "TARGET_80387 || TARGET_SSE"
   "")
 \f
 ;; Remainder instructions.
@@ -10231,29 +10231,56 @@
 ;; Gcc is slightly more smart about handling normal two address instructions
 ;; so use special patterns for add and mull.
 (define_insn "*fop_sf_comm"
-  [(set (match_operand:SF 0 "register_operand" "=f")
+  [(set (match_operand:SF 0 "register_operand" "=f#x,x#f")
        (match_operator:SF 3 "binary_fp_operator"
-                       [(match_operand:SF 1 "register_operand" "%0")
-                        (match_operand:SF 2 "nonimmediate_operand" "fm")]))]
-  "TARGET_80387 && GET_RTX_CLASS (GET_CODE (operands[3])) == 'c'"
+                       [(match_operand:SF 1 "register_operand" "%0,0")
+                        (match_operand:SF 2 "nonimmediate_operand" "fm#x,xm#f")]))]
+  "TARGET_80387 && (!TARGET_SSE || TARGET_MIX_SSE_I387)
+   && GET_RTX_CLASS (GET_CODE (operands[3])) == 'c'"
   "* return output_387_binary_op (insn, operands);"
   [(set (attr "type") 
-        (if_then_else (match_operand:SF 3 "mult_operator" "") 
-           (const_string "fmul")
-           (const_string "fop")))
+       (if_then_else (eq_attr "alternative" "1")
+           (const_string "sse")
+          (if_then_else (match_operand:SF 3 "mult_operator" "") 
+             (const_string "fmul")
+             (const_string "fop"))))
+   (set_attr "mode" "SF")])
+
+(define_insn "*fop_sf_comm_sse"
+  [(set (match_operand:SF 0 "register_operand" "=x")
+       (match_operator:SF 3 "binary_fp_operator"
+                       [(match_operand:SF 1 "register_operand" "%0")
+                        (match_operand:SF 2 "nonimmediate_operand" "xm")]))]
+  "TARGET_SSE && GET_RTX_CLASS (GET_CODE (operands[3])) == 'c'"
+  "* return output_387_binary_op (insn, operands);"
+  [(set_attr "type" "sse")
    (set_attr "mode" "SF")])
 
 (define_insn "*fop_df_comm"
-  [(set (match_operand:DF 0 "register_operand" "=f")
+  [(set (match_operand:DF 0 "register_operand" "=f#Y,Y#f")
        (match_operator:DF 3 "binary_fp_operator"
-                       [(match_operand:DF 1 "register_operand" "%0")
-                        (match_operand:DF 2 "nonimmediate_operand" "fm")]))]
-  "TARGET_80387 && GET_RTX_CLASS (GET_CODE (operands[3])) == 'c'"
+                       [(match_operand:DF 1 "register_operand" "%0,0")
+                        (match_operand:DF 2 "nonimmediate_operand" "fm#Y,Ym#f")]))]
+  "TARGET_80387 && (!TARGET_SSE2 || TARGET_MIX_SSE_I387)
+   && GET_RTX_CLASS (GET_CODE (operands[3])) == 'c'"
   "* return output_387_binary_op (insn, operands);"
   [(set (attr "type") 
-        (if_then_else (match_operand:DF 3 "mult_operator" "") 
-           (const_string "fmul")
-           (const_string "fop")))
+       (if_then_else (eq_attr "alternative" "1")
+           (const_string "sse")
+          (if_then_else (match_operand:SF 3 "mult_operator" "") 
+             (const_string "fmul")
+             (const_string "fop"))))
+   (set_attr "mode" "DF")])
+
+(define_insn "*fop_df_comm_sse"
+  [(set (match_operand:DF 0 "register_operand" "=Y")
+       (match_operator:DF 3 "binary_fp_operator"
+                       [(match_operand:DF 1 "register_operand" "%0")
+                        (match_operand:DF 2 "nonimmediate_operand" "Ym")]))]
+  "TARGET_SSE2
+   && GET_RTX_CLASS (GET_CODE (operands[3])) == 'c'"
+  "* return output_387_binary_op (insn, operands);"
+  [(set_attr "type" "sse")
    (set_attr "mode" "DF")])
 
 (define_insn "*fop_xf_comm"
@@ -10283,16 +10310,18 @@
    (set_attr "mode" "XF")])
 
 (define_insn "*fop_sf_1"
-  [(set (match_operand:SF 0 "register_operand" "=f,f")
+  [(set (match_operand:SF 0 "register_operand" "=f,f,x")
        (match_operator:SF 3 "binary_fp_operator"
-                       [(match_operand:SF 1 "nonimmediate_operand" "0,fm")
-                        (match_operand:SF 2 "nonimmediate_operand" "fm,0")]))]
-  "TARGET_80387
+                       [(match_operand:SF 1 "nonimmediate_operand" "0,fm,0")
+                        (match_operand:SF 2 "nonimmediate_operand" "fm,0,xm#f")]))]
+  "TARGET_80387 && (!TARGET_SSE || TARGET_MIX_SSE_I387)
    && GET_RTX_CLASS (GET_CODE (operands[3])) != 'c'
    && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
   "* return output_387_binary_op (insn, operands);"
   [(set (attr "type") 
-        (cond [(match_operand:SF 3 "mult_operator" "") 
+        (cond [(eq_attr "alternative" "2")
+                 (const_string "sse")
+              (match_operand:SF 3 "mult_operator" "") 
                  (const_string "fmul")
                (match_operand:SF 3 "div_operator" "") 
                  (const_string "fdiv")
@@ -10300,12 +10329,24 @@
               (const_string "fop")))
    (set_attr "mode" "SF")])
 
+(define_insn "*fop_sf_1_sse"
+  [(set (match_operand:SF 0 "register_operand" "=x")
+       (match_operator:SF 3 "binary_fp_operator"
+                       [(match_operand:SF 1 "register_operand" "0")
+                        (match_operand:SF 2 "nonimmediate_operand" "xm")]))]
+  "TARGET_SSE
+   && GET_RTX_CLASS (GET_CODE (operands[3])) != 'c'"
+  "* return output_387_binary_op (insn, operands);"
+  [(set_attr "type" "sse")
+   (set_attr "mode" "SF")])
+
+;; ??? Add SSE splitters for these!
 (define_insn "*fop_sf_2"
   [(set (match_operand:SF 0 "register_operand" "=f,f")
        (match_operator:SF 3 "binary_fp_operator"
          [(float:SF (match_operand:SI 1 "nonimmediate_operand" "m,?r"))
           (match_operand:SF 2 "register_operand" "0,0")]))]
-  "TARGET_80387 && TARGET_USE_FIOP"
+  "TARGET_80387 && TARGET_USE_FIOP && !TARGET_SSE"
   "* return which_alternative ? \"#\" : output_387_binary_op (insn, operands);"
   [(set (attr "type") 
         (cond [(match_operand:SF 3 "mult_operator" "") 
@@ -10323,7 +10364,7 @@
        (match_operator:SF 3 "binary_fp_operator"
          [(match_operand:SF 1 "register_operand" "0,0")
           (float:SF (match_operand:SI 2 "nonimmediate_operand" "m,?r"))]))]
-  "TARGET_80387 && TARGET_USE_FIOP"
+  "TARGET_80387 && TARGET_USE_FIOP && !TARGET_SSE"
   "* return which_alternative ? \"#\" : output_387_binary_op (insn, operands);"
   [(set (attr "type") 
         (cond [(match_operand:SF 3 "mult_operator" "") 
@@ -10337,16 +10378,18 @@
    (set_attr "mode" "SI")])
 
 (define_insn "*fop_df_1"
-  [(set (match_operand:DF 0 "register_operand" "=f,f")
+  [(set (match_operand:DF 0 "register_operand" "=f#Y,f#Y,Y#f")
        (match_operator:DF 3 "binary_fp_operator"
-                       [(match_operand:DF 1 "nonimmediate_operand" "0,fm")
-                        (match_operand:DF 2 "nonimmediate_operand" "fm,0")]))]
-  "TARGET_80387
+                       [(match_operand:DF 1 "nonimmediate_operand" "0,fm,0")
+                        (match_operand:DF 2 "nonimmediate_operand" "fm,0,Ym#f")]))]
+  "TARGET_80387 && (!TARGET_SSE2 || TARGET_MIX_SSE_I387)
    && GET_RTX_CLASS (GET_CODE (operands[3])) != 'c'
    && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
   "* return output_387_binary_op (insn, operands);"
   [(set (attr "type") 
-        (cond [(match_operand:DF 3 "mult_operator" "") 
+        (cond [(eq_attr "alternative" "2")
+                 (const_string "sse")
+              (match_operand:DF 3 "mult_operator" "") 
                  (const_string "fmul")
                (match_operand:DF 3 "div_operator" "") 
                  (const_string "fdiv")
@@ -10354,12 +10397,23 @@
               (const_string "fop")))
    (set_attr "mode" "DF")])
 
+(define_insn "*fop_df_1_sse"
+  [(set (match_operand:DF 0 "register_operand" "=Y")
+       (match_operator:DF 3 "binary_fp_operator"
+                       [(match_operand:DF 1 "register_operand" "0")
+                        (match_operand:DF 2 "nonimmediate_operand" "Ym")]))]
+  "TARGET_SSE
+   && GET_RTX_CLASS (GET_CODE (operands[3])) != 'c'"
+  "* return output_387_binary_op (insn, operands);"
+  [(set_attr "type" "sse")])
+
+;; ??? Add SSE splitters for these!
 (define_insn "*fop_df_2"
   [(set (match_operand:DF 0 "register_operand" "=f,f")
        (match_operator:DF 3 "binary_fp_operator"
           [(float:DF (match_operand:SI 1 "nonimmediate_operand" "m,?r"))
            (match_operand:DF 2 "register_operand" "0,0")]))]
-  "TARGET_80387 && TARGET_USE_FIOP"
+  "TARGET_80387 && TARGET_USE_FIOP && !TARGET_SSE2"
   "* return which_alternative ? \"#\" : output_387_binary_op (insn, operands);"
   [(set (attr "type") 
         (cond [(match_operand:DF 3 "mult_operator" "") 
@@ -10377,7 +10431,7 @@
        (match_operator:DF 3 "binary_fp_operator"
           [(match_operand:DF 1 "register_operand" "0,0")
            (float:DF (match_operand:SI 2 "nonimmediate_operand" "m,?r"))]))]
-  "TARGET_80387 && TARGET_USE_FIOP"
+  "TARGET_80387 && TARGET_USE_FIOP && !TARGET_SSE2"
   "* return which_alternative ? \"#\" : output_387_binary_op (insn, operands);"
   [(set (attr "type") 
         (cond [(match_operand:DF 3 "mult_operator" "") 
@@ -10413,7 +10467,7 @@
          [(match_operand:DF 1 "register_operand" "0,f")
           (float_extend:DF
            (match_operand:SF 2 "nonimmediate_operand" "fm,0"))]))]
-  "TARGET_80387"
+  "TARGET_80387 && !TARGET_SSE2"
   "* return output_387_binary_op (insn, operands);"
   [(set (attr "type") 
         (cond [(match_operand:DF 3 "mult_operator" "")