Added GP_RINGOSC primitive

diff --git a/techlibs/greenpak4/cells_sim.v b/techlibs/greenpak4/cells_sim.v
index f013d9b71f4ef62ccc755ede9cf5e68f73d889a7..d3a176b88326145bcd4a71f931565dd42621eda0 100644 (file)
--- a/techlibs/greenpak4/cells_sim.v
+++ b/techlibs/greenpak4/cells_sim.v
@@ -75,6 +75,9 @@ module GP_LFOSC(input PWRDN, output reg CLKOUT);
        
        initial CLKOUT = 0;
        
+       //auto powerdown not implemented for simulation
+       //output dividers not implemented for simulation
+       
        always begin
                if(PWRDN)
                        clkout = 0;
@@ -87,6 +90,29 @@ module GP_LFOSC(input PWRDN, output reg CLKOUT);
        
 endmodule
 
+module GP_RINGOSC(input PWRDN, output reg CLKOUT);
+       
+       parameter PWRDN_EN = 0;
+       parameter AUTO_PWRDN = 0;
+       parameter OUT_DIV = 1;
+       
+       initial CLKOUT = 0;
+       
+       //output dividers not implemented for simulation
+       //auto powerdown not implemented for simulation
+       
+       always begin
+               if(PWRDN)
+                       clkout = 0;
+               else begin
+                       //half period of 27 MHz
+                       #18.518;
+                       clkout = ~clkout;
+               end
+       end
+       
+endmodule
+
 module GP_COUNT8(input CLK, input wire RST, output reg OUT);
 
        parameter RESET_MODE    = "RISING";