Merge branch 'master' of https://github.com/m-labs/misoc

Conflicts:
	misoclib/mem/litesata/doc/source/docs/frontend/index.rst

diff --cc misoclib/mem/litesata/doc/source/docs/frontend/index.rst
index bed6eb939f4f4742f32a8c3d2a734ab078a4c565,21b03f0cec75379b625253e9af42929fe93e71d3..07cce992765c419b967f56064b6d2361750a9707
--- 1/misoclib/mem/litesata/doc/source/docs/frontend/index.rst
--- 2/misoclib/mem/litesata/doc/source/docs/frontend/index.rst
+++ b/misoclib/mem/litesata/doc/source/docs/frontend/index.rst
@@@ -12,16 -12,16 +12,16 @@@ An interface has 2 endpoints
  
  Packets and user commands/responses are described in the next sections.
  
 -Packets description
 -===================
 +Packet description
 +==================
  
- Sink and Source are packets with additional parameters. A packet has the following signals:
+ Sink and Source endpoints use packets with additional parameters. A packet has the following signals:
  
-  - :code:`stb`: Strobe signal indicates that command or data is valid.
-  - :code:`sop`: Start Of Packet signal indicates that current command or data is the first of the packet.
-  - :code:`eop`: End Of Packet signal indicates that current command or data is the last of the packet.
-  - :code:`ack`: Response from the endpoint indicates that core is able to accept our command or data.
-  - :code:`data`: Current data of the packet.
+  - :code:`stb`: Strobe signal, indicates that command or data is valid.
+  - :code:`sop`: Start Of Packet signal, indicates that current command or data is the first of the packet.
+  - :code:`eop`: End Of Packet signal, indicates that current command or data is the last of the packet.
+  - :code:`ack`: Acknowledge signal, indicates the destination is able to accept current data.
+  - :code:`data`: Data signal.
  
  .. figure:: packets.png
     :width: 50%
@@@ -37,14 -37,14 +37,14 @@@
  User Commands
  =============
  
- All transfers are initiated using the Sink endpoint which has the following signals:
+ All transfers are initiated using the Sink endpoint of the interface which has the following signals:
  
 - - :code:`write`: 1 bit signal, indicates a write command.
 - - :code:`read`: 1 bit signal, indicaties a aread command.
 - - :code:`identify`: 1 bit signal, indicates an identify command. (used to get HDD informations).
 - - :code:`sector`: 48 bits signal, sector number for the write or read.
 - - :code:`count`: 16 bits signal, number of sectors for the write or read.
 - - :code:`data`: n x 32 bits signal, write data. (n depends of the frontend module)
 + - :code:`write`: 1 bit signal, indicates if we want to write data to the HDD.
-  - :code:`read`: 1 bit signal, indicaties if we want to read data from the HDD.
++ - :code:`read`: 1 bit signal, indicates if we want to read data from the HDD.
 + - :code:`identify`: 1 bit signal, indicates if the command is an identify device command (use to get HDD information).
 + - :code:`sector`: 48 bits signal, the sector number we are going to write or read.
 + - :code:`count`: 16 bits signal, the number of sectors we are going to write or read.
 + - :code:`data`: n x 32 bits signal, the write data. (n depends of the frontend module)
  
  .. tip::
  
@@@ -57,12 -57,12 +57,12 @@@ User Response
  
  Responses are obtained from the Source endpoint which has the following signals:
  
 - - :code:`write`: 1 bit signal, indicates a write response.
 - - :code:`read`: 1 bit signal, indicaties a read response.
 - - :code:`identify`: 1 bit signal, indicates an identify response.
 - - :code:`last`: 1 bit signal, indicates it's the last packet of the response. (A response can be return in several packets)
 - - :code:`failed`: 1 bit signal, indicates that an error was detected in the response (CRC, FIS...)
 - - :code:`data`: n x 32 bits signal, read data. (n depends of the frontend module)
 + - :code:`write`: 1 bit signal, indicates if the command was a write.
-  - :code:`read`: 1 bit signal, indicaties if the command was a read.
++ - :code:`read`: 1 bit signal, indicates if the command was a read.
 + - :code:`identify`: 1 bit signal, indicates if the command was an identify device command.
 + - :code:`last`: 1 bit signal, indicates if this is the last packet of the response. (A response can be return in several packets)
 + - :code:`failed`: 1 bit signal, indicates if an error was detected in the response (CRC, FIS...)
 + - :code:`data`: n x 32 bits signal, the read data. (n depends of the frontend module)
  
  .. tip::
  
@@@ -82,7 -82,7 +82,7 @@@ LiteSATA provides a configurable and fl
  Crossbar
  ========
  
- The crossbar lets the user request any number of ports. It automatically arbitrates requests and dispatches responses to the corresponding ports.
 -The crossbar allows the user to request any number of ports for its application. It automatically arbitrates requests and dispatches responses to the corresponding ports.
++The crossbar allows the user to request any number of ports for their application. It automatically arbitrates requests and dispatches responses to the corresponding ports.
  
  The following example creates a crossbar and 2 user ports:
  
@@@ -146,16 -146,18 +146,18 @@@ Characteristics
    - total writes throughput = (slowest) :code:`controller`'s throughput
    - total reads throughput = N x :code:`controller`'s throughput
  
 -It can be used for data redundancy and/or to increase total reads speed.
 +It can be used for data redundancy and/or to increase the total read speed.
  
+ The following example creates a mirroring with 2 HDDs:
+ 
  .. code-block:: python
  
      self.submodules.sata_mirroring = LiteSATAMirroring([self.sata_core0, self.sata_core1])
  
- :code:`sata_striping`'s ports[0] and ports[1] are the user interfaces.
+ :code:`sata_striping`'s :code:`ports[0]` and :code:`ports[1]` are the user interfaces.
  
 -Modules combinations
 -====================
 +Module combinations
 +===================
  
  Since all frontend modules share the same interface, it's easy to combine them together.