panfrost/midgard: Implement fpow
authorAlyssa Rosenzweig <alyssa@rosenzweig.io>
Wed, 13 Mar 2019 05:01:43 +0000 (05:01 +0000)
committerAlyssa Rosenzweig <alyssa@rosenzweig.io>
Thu, 14 Mar 2019 22:50:24 +0000 (22:50 +0000)
We have a native op for this, which was just found in a disassembly --
so instead of lowering, use it!

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
src/gallium/drivers/panfrost/midgard/helpers.h
src/gallium/drivers/panfrost/midgard/midgard.h
src/gallium/drivers/panfrost/midgard/midgard_compile.c
src/gallium/drivers/panfrost/midgard/midgard_compile.h

index b597e516f20ddc965e56273f1f36120afaf06e76..606eb9982e7ee7364111a51b10043261857988e7 100644 (file)
@@ -228,6 +228,7 @@ static unsigned alu_opcode_props[256] = {
         [midgard_alu_op_frcp]           = UNIT_VLUT,
         [midgard_alu_op_frsqrt]                 = UNIT_VLUT,
         [midgard_alu_op_fsqrt]          = UNIT_VLUT,
+        [midgard_alu_op_fpow]           = UNIT_VLUT,
         [midgard_alu_op_fexp2]          = UNIT_VLUT,
         [midgard_alu_op_flog2]          = UNIT_VLUT,
 
index f6b83d30f5da23578c197254ecf63fc4101f4f3c..39b1df5d915f85582ef5b32ed9c51de522addb60 100644 (file)
@@ -108,6 +108,7 @@ typedef enum {
         midgard_alu_op_fcsel      = 0xC5,
         midgard_alu_op_fround     = 0xC6,
         midgard_alu_op_fatan_pt2  = 0xE8,
+        midgard_alu_op_fpow       = 0xEC,
         midgard_alu_op_frcp       = 0xF0,
         midgard_alu_op_frsqrt     = 0xF2,
         midgard_alu_op_fsqrt      = 0xF3,
@@ -462,6 +463,7 @@ static char *alu_opcode_names[256] = {
         [midgard_alu_op_frcp]       = "frcp",
         [midgard_alu_op_frsqrt]     = "frsqrt",
         [midgard_alu_op_fsqrt]      = "fsqrt",
+        [midgard_alu_op_fpow]       = "fpow",
         [midgard_alu_op_fexp2]      = "fexp2",
         [midgard_alu_op_flog2]      = "flog2",
         [midgard_alu_op_fsin]       = "fsin",
index a6c4b4498da39e02203aeb8878dd32dc474e4e49..7f3b6997ca0aa62a514e464e47f35a273de701a4 100644 (file)
@@ -990,6 +990,7 @@ emit_alu(compiler_context *ctx, nir_alu_instr *instr)
                 ALU_CASE(frcp, frcp);
                 ALU_CASE(frsq, frsqrt);
                 ALU_CASE(fsqrt, fsqrt);
+                ALU_CASE(fpow, fpow);
                 ALU_CASE(fexp2, fexp2);
                 ALU_CASE(flog2, flog2);
 
index 2fcbc3171644103782746263c6f08ec5df4cd335..6225d041c077e81a718e2b94d9d4f6db1febfd4a 100644 (file)
@@ -62,7 +62,6 @@ midgard_compile_shader_nir(nir_shader *nir, midgard_program *program, bool is_bl
 static const nir_shader_compiler_options midgard_nir_options = {
         .lower_ffma = true,
         .lower_sub = true,
-        .lower_fpow = true,
         .lower_scmp = true,
         .lower_flrp32 = true,
         .lower_flrp64 = true,