projects
/
yosys.git
/ commitdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
| commitdiff |
tree
raw
|
patch
| inline |
side by side
(parent:
5f9ba3e
)
Try -W 300
author
Eddie Hung
<eddie@fpgeh.com>
Sun, 16 Jun 2019 19:08:03 +0000
(12:08 -0700)
committer
Eddie Hung
<eddie@fpgeh.com>
Sun, 16 Jun 2019 19:08:03 +0000
(12:08 -0700)
techlibs/xilinx/synth_xilinx.cc
patch
|
blob
|
history
diff --git
a/techlibs/xilinx/synth_xilinx.cc
b/techlibs/xilinx/synth_xilinx.cc
index 63ede275f9b2db92bed62b3b15029517719cc988..7b20a7132c3ba02cd107c5f1cc1b395051c82c55 100644
(file)
--- a/
techlibs/xilinx/synth_xilinx.cc
+++ b/
techlibs/xilinx/synth_xilinx.cc
@@
-25,7
+25,8
@@
USING_YOSYS_NAMESPACE
PRIVATE_NAMESPACE_BEGIN
-#define XC7_WIRE_DELAY "160"
+#define XC7_WIRE_DELAY "300" // Number with which ABC will map a 6-input gate
+ // to one LUT6 (instead of a LUT5 + LUT2)
struct SynthXilinxPass : public ScriptPass
{