i965: Add an option to not generate the SIMD8 fragment shader
authorKristian Høgsberg <krh@bitplanet.net>
Mon, 7 Jul 2014 21:49:12 +0000 (14:49 -0700)
committerKristian Høgsberg <krh@bitplanet.net>
Fri, 15 Aug 2014 17:33:41 +0000 (10:33 -0700)
For now, this can only be triggered with a new 'no8' INTEL_DEBUG option
and a new context flag.  We'll use the context flag later, but introducing
it now lets us bisect to this commit if it breaks something.

Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
src/mesa/drivers/dri/i965/brw_context.h
src/mesa/drivers/dri/i965/brw_fs.cpp
src/mesa/drivers/dri/i965/gen7_wm_state.c
src/mesa/drivers/dri/i965/gen8_ps_state.c
src/mesa/drivers/dri/i965/intel_debug.c
src/mesa/drivers/dri/i965/intel_debug.h

index 2367a95e6afae7bcb34c6c327d434a74801df761..f84ced9f9d0897e1f6ffc7ba38e7fd461915e65f 100644 (file)
@@ -341,6 +341,7 @@ struct brw_wm_prog_data {
       /** @} */
    } binding_table;
 
+   bool no_8;
    bool dual_src_blend;
    bool uses_pos_offset;
    bool uses_omask;
@@ -1032,6 +1033,7 @@ struct brw_context
    bool has_compr4;
    bool has_negative_rhw_bug;
    bool has_pln;
+   bool no_simd8;
 
    /**
     * Some versions of Gen hardware don't do centroid interpolation correctly
index ed7a0bce8caee370502375d3cbc6ba2126ac87b7..565189ba3aa0e6d2ac914bb4740b9d6748fba271 100644 (file)
@@ -3299,10 +3299,20 @@ brw_wm_fs_emit(struct brw_context *brw,
       }
    }
 
+   exec_list *simd8_instructions;
+   int no_simd8 = (INTEL_DEBUG & DEBUG_NO8) || brw->no_simd8;
+   if (no_simd8 && simd16_instructions) {
+      simd8_instructions = NULL;
+      prog_data->no_8 = true;
+   } else {
+      simd8_instructions = &v.instructions;
+      prog_data->no_8 = false;
+   }
+
    const unsigned *assembly = NULL;
    fs_generator g(brw, mem_ctx, key, prog_data, prog, fp,
                   v.runtime_check_aads_emit, INTEL_DEBUG & DEBUG_WM);
-   assembly = g.generate_assembly(&v.instructions, simd16_instructions,
+   assembly = g.generate_assembly(simd8_instructions, simd16_instructions,
                                   final_assembly_size);
 
    if (unlikely(brw->perf_debug) && shader) {
index c03d19db1639a4e27eef21c06d4ee8852b23f96f..c3e93164c18fe890a1bf467b7ad111d964616875 100644 (file)
@@ -223,9 +223,9 @@ upload_ps_state(struct brw_context *brw)
       _mesa_get_min_invocations_per_fragment(ctx, brw->fragment_program, false);
    assert(min_inv_per_frag >= 1);
 
-   if (brw->wm.prog_data->prog_offset_16) {
+   if (brw->wm.prog_data->prog_offset_16 || brw->wm.prog_data->no_8) {
       dw4 |= GEN7_PS_16_DISPATCH_ENABLE;
-      if (min_inv_per_frag == 1) {
+      if (!brw->wm.prog_data->no_8 && min_inv_per_frag == 1) {
          dw4 |= GEN7_PS_8_DISPATCH_ENABLE;
          dw5 |= (brw->wm.prog_data->base.dispatch_grf_start_reg <<
                  GEN7_PS_DISPATCH_START_GRF_SHIFT_0);
index f58d49c55cb3b17b03c317f52f22f373e7d93e29..49d4fe0e4f8c662f32194349a0fc95b9e58bb58e 100644 (file)
@@ -195,9 +195,9 @@ upload_ps_state(struct brw_context *brw)
       _mesa_get_min_invocations_per_fragment(ctx, brw->fragment_program, false);
    assert(min_invocations_per_fragment >= 1);
 
-   if (brw->wm.prog_data->prog_offset_16) {
+   if (brw->wm.prog_data->prog_offset_16 || brw->wm.prog_data->no_8) {
       dw6 |= GEN7_PS_16_DISPATCH_ENABLE;
-      if (min_invocations_per_fragment == 1) {
+      if (!brw->wm.prog_data->no_8 && min_invocations_per_fragment == 1) {
          dw6 |= GEN7_PS_8_DISPATCH_ENABLE;
          dw7 |= (brw->wm.prog_data->base.dispatch_grf_start_reg <<
                  GEN7_PS_DISPATCH_START_GRF_SHIFT_0);
index c72fce2581af532f40ecab47c10310aa591fdab0..1fb8b6cd1e23963ecbc1f032414a510b631634fc 100644 (file)
@@ -66,6 +66,7 @@ static const struct dri_debug_control debug_control[] = {
    { "nodualobj", DEBUG_NO_DUAL_OBJECT_GS },
    { "optimizer", DEBUG_OPTIMIZER },
    { "noann", DEBUG_NO_ANNOTATION },
+   { "no8",  DEBUG_NO8 },
    { NULL,    0 }
 };
 
index 37dc34a26111827f5f1db6c3fb7c45afd3049b06..8e1c2991f078f8457fceeef8241132fa53b93852 100644 (file)
@@ -62,6 +62,7 @@ extern uint64_t INTEL_DEBUG;
 #define DEBUG_NO_DUAL_OBJECT_GS 0x80000000
 #define DEBUG_OPTIMIZER   0x100000000
 #define DEBUG_NO_ANNOTATION 0x200000000
+#define DEBUG_NO8        0x40000000
 
 #ifdef HAVE_ANDROID_PLATFORM
 #define LOG_TAG "INTEL-MESA"