re PR target/54236 ([SH] Improve addc and subc insn utilization)

gcc/testsuite/
	PR target/54236
	* gcc.target/sh/pr54236-4.c: New.

From-SVN: r220093

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index e785ed407b8bf967fc6bcaf505169541d5007fbd..d1677593f246773dbc32a48bfc1d45fce48130e9 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2015-01-25  Oleg Endo  <olegendo@gcc.gnu.org>
+
+       PR target/54236
+       * gcc.target/sh/pr54236-4.c: New.
+
 2015-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 
        * gcc.target/i386/builtin_target.c (check_intel_cpu_model): Add

diff --git a/gcc/testsuite/gcc.target/sh/pr54236-4.c b/gcc/testsuite/gcc.target/sh/pr54236-4.c
new file mode 100644 (file)
index 0000000..dce413e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sh/pr54236-4.c
@@ -0,0 +1,70 @@
+/* Check that addc and subc patterns are converted if the T value is
+   inverted.  */
+/* { dg-do compile }  */
+/* { dg-options "-O2" }  */
+/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } }  */
+/* { dg-final { scan-assembler-times "cmp/eq" 7 } }  */
+
+/* { dg-final { scan-assembler-times "subc" 5 { target { ! sh2a } } } }  */
+/* { dg-final { scan-assembler-times "not\t" 3 { target { ! sh2a } } } }  */
+/* { dg-final { scan-assembler-times "addc" 2 { target { ! sh2a } } } }  */
+
+/* { dg-final { scan-assembler-times "subc" 2 { target { sh2a } } } }  */
+/* { dg-final { scan-assembler-times "addc" 5 { target { sh2a } } } }  */
+/* { dg-final { scan-assembler-times "nott" 3 { target { sh2a } } } }  */
+
+/* { dg-final { scan-assembler-not "movt" } }  */
+/* { dg-final { scan-assembler-not "negc" } }  */
+/* { dg-final { scan-assembler-not "movrt" } }  */
+
+int
+test_0 (int a, int b, int c)
+{
+  /* 1x cmp/eq, 1x subc  */
+  return c + (a != b);
+}
+
+int
+test_1 (int a, int b, int c, int d)
+{
+  /* 1x cmp/eq, 1x not, 1x subc
+     SH2A: 1x cmp/eq, 1x nott, 1x addc  */
+  return (a != b) + c + d;
+}
+
+int
+test_2 (int a, int b, int c, int d)
+{
+  /* 1x cmp/eq, 1x not, 1x subc
+     SH2A: 1x cmp/eq, 1x nott, 1x addc  */
+  return c + (a != b) + d;
+}
+
+int
+test_3 (int a, int b, int c, int d)
+{
+  /* 1x cmp/eq, 1x not, 1x subc
+     SH2A: 1x cmp/eq, 1x nott, 1x addc  */
+  return c + d + (a != b);
+}
+
+int
+test_4 (int a, int b, int c, int d)
+{
+  /* 1x cmp/eq, 1x subc  */
+  return (a != b) - c;
+}
+
+int
+test_5 (int a, int b, int c, int d)
+{
+  /* 1x cmp/eq, 1x add #-1, 1x addc  */
+  return c - (a != b);
+}
+
+int
+test_6 (int a, int b, int c, int d)
+{
+  /* 1x cmp/eq, 1x add #-1, 1x addc  */
+  return c - (a != b) + d;
+}