re PR target/22432 (Wrong code generation using MMX intrinsics on amd64)

./:	PR target/22432
	* combine.c (apply_distributive_law): Don't distribute across a
	vector mode subreg.
testsuite/:
	PR target/22432
	* gcc.target/i386/pr22432.c: New test.

From-SVN: r106555

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 826d89e97bcfa5382c4bdc1ed93dced131f224ed..c752e61600e5c7953b18bb338c59fab10d26ffcf 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2005-11-05  Ian Lance Taylor  <ian@airs.com>
+
+       PR target/22432
+       * combine.c (apply_distributive_law): Don't distribute across a
+       vector mode subreg.
+
 2005-11-05  Kazu Hirata  <kazu@codesourcery.com>
 
        * c-typeck.c, config/i386/netware.h, config/m32c/cond.md,

diff --git a/gcc/combine.c b/gcc/combine.c
index ff10663a147ffda105e8da8463c1c9ab80f60303..82d260dafbcd45ad9c909420fd6ac997991c809a 100644 (file)
--- a/gcc/combine.c
+++ b/gcc/combine.c
@@ -8117,14 +8117,15 @@ apply_distributive_law (rtx x)
       break;
 
     case SUBREG:
-      /* Non-paradoxical SUBREGs distributes over all operations, provided
-        the inner modes and byte offsets are the same, this is an extraction
-        of a low-order part, we don't convert an fp operation to int or
-        vice versa, and we would not be converting a single-word
-        operation into a multi-word operation.  The latter test is not
-        required, but it prevents generating unneeded multi-word operations.
-        Some of the previous tests are redundant given the latter test, but
-        are retained because they are required for correctness.
+      /* Non-paradoxical SUBREGs distributes over all operations,
+        provided the inner modes and byte offsets are the same, this
+        is an extraction of a low-order part, we don't convert an fp
+        operation to int or vice versa, this is not a vector mode,
+        and we would not be converting a single-word operation into a
+        multi-word operation.  The latter test is not required, but
+        it prevents generating unneeded multi-word operations.  Some
+        of the previous tests are redundant given the latter test,
+        but are retained because they are required for correctness.
 
         We produce the result slightly differently in this case.  */
 
@@ -8135,6 +8136,7 @@ apply_distributive_law (rtx x)
              != GET_MODE_CLASS (GET_MODE (SUBREG_REG (lhs))))
          || (GET_MODE_SIZE (GET_MODE (lhs))
              > GET_MODE_SIZE (GET_MODE (SUBREG_REG (lhs))))
+         || VECTOR_MODE_P (GET_MODE (lhs))
          || GET_MODE_SIZE (GET_MODE (SUBREG_REG (lhs))) > UNITS_PER_WORD)
        return x;
 

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 70965443fbfe620855140ddbf3d0ec10442b0be5..9fc72af22ba3fa2ae32ead815aebcc167a2c18d6 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2005-11-05  Ian Lance Taylor  <ian@airs.com>
+
+       PR target/22432
+       * gcc.target/i386/pr22432.c: New test.
+
 2005-11-05  Richard Henderson  <rth@redhat.com>
 
        * gcc.target/alpha/asm-1.c: Move from gcc.dg/asm-5.c.

diff --git a/gcc/testsuite/gcc.target/i386/pr22432.c b/gcc/testsuite/gcc.target/i386/pr22432.c
new file mode 100644 (file)
index 0000000..86ae4b2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr22432.c
@@ -0,0 +1,20 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mmmx" } */
+/* { dg-final { scan-assembler-not "paddb" } } */
+
+typedef int v2si __attribute__ ((__vector_size__ (8)));
+typedef short v4hi __attribute__ ((__vector_size__ (8)));
+typedef char v8qi __attribute__ ((__vector_size__ (8)));
+
+int
+foo (unsigned int *a, unsigned int *b)
+{
+  long long i, j, k;
+
+  i = (long long) __builtin_ia32_vec_init_v2si (*a, 0);
+  j = (long long) __builtin_ia32_vec_init_v2si (*b, 0);
+  i = (long long) __builtin_ia32_punpcklbw ((v8qi) i, (v8qi) 0ll);
+  j = (long long) __builtin_ia32_punpcklbw ((v8qi) j, (v8qi) 0ll);
+  k = (long long) __builtin_ia32_paddw ((v4hi) i, (v4hi) j);
+  return __builtin_ia32_vec_ext_v2si ((v2si) k, 0);
+}