soc/software/bios/sdram: ECP5 move strobe dly_sel
authorGreg Davill <greg.davill@gmail.com>
Sat, 25 Jan 2020 23:25:38 +0000 (09:55 +1030)
committerGreg Davill <greg.davill@gmail.com>
Sat, 25 Jan 2020 23:25:38 +0000 (09:55 +1030)
litex/soc/software/bios/sdram.c

index 15d5e1e9fa6522847ac15f24fb9f51fce6aefbc7..4f2bc81099519370f14a2e031674befd3a3dfea6 100644 (file)
@@ -419,6 +419,12 @@ static void read_delay_rst(int module) {
 
        /* unsel module */
        ddrphy_dly_sel_write(0);
+
+#ifdef ECP5DDRPHY
+       /* Sync all DQSBUFM's, By toggling all dly_sel (DQSBUFM.PAUSE) lines. */
+       ddrphy_dly_sel_write(0xFF);
+       ddrphy_dly_sel_write(0);
+#endif
 }
 
 static void read_delay_inc(int module) {
@@ -430,6 +436,12 @@ static void read_delay_inc(int module) {
 
        /* unsel module */
        ddrphy_dly_sel_write(0);
+
+#ifdef ECP5DDRPHY
+       /* Sync all DQSBUFM's, By toggling all dly_sel (DQSBUFM.PAUSE) lines. */
+       ddrphy_dly_sel_write(0xFF);
+       ddrphy_dly_sel_write(0);
+#endif
 }
 
 static void read_bitslip_rst(char m)
@@ -943,12 +955,6 @@ int sdrlevel(void)
                printf("\n");
        }
 
-#ifdef ECP5DDRPHY
-       /* Toggle all dly_sel lines. 
-        * Which toggles all DQSBUFM.PAUSE lines, this ensures they're using the correct delays. */
-       ddrphy_dly_sel_write(0xFF);
-       ddrphy_dly_sel_write(0);
-#endif
 
        return 1;
 }