items.
* doc/c-alpha.texi (Alpha Options): Likewise.
* doc/c-arm.texi (ARM Directives): Likewise.
* doc/c-bfin.texi (Blackfin Options): Likewise.
* doc/c-d10v.texi (D10V-Opts): Likewise.
* doc/c-i386.texi (i386-Options): Likewise.
* doc/c-ia64.texi (IA-64 Options): Likewise.
* doc/c-m68k.texi (M68K-Opts): Likewise.
* doc/c-tic54x.texi (TIC54X-Directives): Likewise.
* doc/internals.texi (Symbols): Likewise.
+2010-06-21 Andreas Schwab <schwab@redhat.com>
+
+ * doc/as.texinfo (Overview): Use @itemx for grouped @table
+ items.
+ * doc/c-alpha.texi (Alpha Options): Likewise.
+ * doc/c-arm.texi (ARM Directives): Likewise.
+ * doc/c-bfin.texi (Blackfin Options): Likewise.
+ * doc/c-d10v.texi (D10V-Opts): Likewise.
+ * doc/c-i386.texi (i386-Options): Likewise.
+ * doc/c-ia64.texi (IA-64 Options): Likewise.
+ * doc/c-m68k.texi (M68K-Opts): Likewise.
+ * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
+ * doc/internals.texi (Symbols): Likewise.
+
2010-06-21 Alan Modra <amodra@gmail.com>
PR gas/11733
is not used in assembler.
@item -mfdpic
Assemble for the FDPIC ABI.
-@item -mno-fdpic/-mnopic
+@item -mno-fdpic
+@itemx -mnopic
Disable -mfdpic.
@end table
@end ifset
@cindex @code{-replace} command line option, Alpha
@cindex @code{-noreplace} command line option, Alpha
@item -replace
-@item -noreplace
+@itemx -noreplace
Enables or disables the optimization of procedure calls, both at assemblage
and at link time. These options are only available for VMS targets and
@code{-replace} is the default. See section 1.4.1 of the OpenVMS Linker
@cindex @code{.dn} and @code{.qn} directives, ARM
@item @var{name} .dn @var{register name} [@var{.type}] [[@var{index}]]
-@item @var{name} .qn @var{register name} [@var{.type}] [[@var{index}]]
+@itemx @var{name} .qn @var{register name} [@var{.type}] [[@var{index}]]
The @code{dn} and @code{qn} directives are used to create typed
and/or indexed register aliases for use in Advanced SIMD Extension
@cindex @code{.inst} directive, ARM
@item .inst @var{opcode} [ , @dots{} ]
-@item .inst.n @var{opcode} [ , @dots{} ]
-@item .inst.w @var{opcode} [ , @dots{} ]
+@itemx .inst.n @var{opcode} [ , @dots{} ]
+@itemx .inst.w @var{opcode} [ , @dots{} ]
Generates the instruction corresponding to the numerical value @var{opcode}.
@code{.inst.n} and @code{.inst.w} allow the Thumb instruction size to be
specified explicitly, overriding the normal encoding rules.
@cindex @code{-mno-fdpic} command line option, Blackfin
@cindex @code{-mnopic} command line option, Blackfin
-@item -mno-fdpic/-mnopic
+@item -mno-fdpic
+@itemx -mnopic
Disable -mfdpic.
@end table
order of instructions. Normally this generates a warning. When this option
is used, no warning will be generated when instructions are swapped.
@item --gstabs-packing
-@item --no-gstabs-packing
+@itemx --no-gstabs-packing
@code{@value{AS}} packs adjacent short instructions into a single packed
instruction. @samp{--no-gstabs-packing} turns instruction packing off if
@samp{--gstabs} is specified as well; @samp{--gstabs-packing} (the
@cindex @samp{-msse-check=} option, i386
@cindex @samp{-msse-check=} option, x86-64
@item -msse-check=@var{none}
-@item -msse-check=@var{warning}
-@item -msse-check=@var{error}
+@itemx -msse-check=@var{warning}
+@itemx -msse-check=@var{error}
These options control if the assembler should check SSE intructions.
@option{-msse-check=@var{none}} will make the assembler not to check SSE
instructions, which is the default. @option{-msse-check=@var{warning}}
@cindex @samp{-mavxscalar=} option, i386
@cindex @samp{-mavxscalar=} option, x86-64
@item -mavxscalar=@var{128}
-@item -mavxscalar=@var{256}
+@itemx -mavxscalar=@var{256}
This options control how the assembler should encode scalar AVX
instructions. @option{-mavxscalar=@var{128}} will encode scalar
AVX instructions with 128bit vector length, which is the default.
@cindex @samp{-mmnemonic=} option, i386
@cindex @samp{-mmnemonic=} option, x86-64
@item -mmnemonic=@var{att}
-@item -mmnemonic=@var{intel}
+@itemx -mmnemonic=@var{intel}
This option specifies instruction mnemonic for matching instructions.
The @code{.att_mnemonic} and @code{.intel_mnemonic} directives will
take precedent.
@cindex @samp{-msyntax=} option, i386
@cindex @samp{-msyntax=} option, x86-64
@item -msyntax=@var{att}
-@item -msyntax=@var{intel}
+@itemx -msyntax=@var{intel}
This option specifies instruction syntax when processing instructions.
The @code{.att_syntax} and @code{.intel_syntax} directives will
take precedent.
turn on the EF_IA_64_NOFUNCDESC_CONS_GP flag in the ELF file header.
@item -milp32
-@item -milp64
-@item -mlp64
-@item -mp64
+@itemx -milp64
+@itemx -mlp64
+@itemx -mp64
These options select the data model. The assembler defaults to @code{-mlp64}
(LP64 data model).
@item -mle
-@item -mbe
+@itemx -mbe
These options select the byte order. The @code{-mle} option selects little-endian
byte order (default) and @code{-mbe} selects big-endian byte order. Note that
IA-64 machine code always uses little-endian byte order.
@item -mtune=itanium1
-@item -mtune=itanium2
+@itemx -mtune=itanium2
Tune for a particular IA-64 CPU, @var{itanium1} or @var{itanium2}. The
default is @var{itanium2}.
@item -munwind-check=warning
-@item -munwind-check=error
+@itemx -munwind-check=error
These options control what the assembler will do when performing
consistency checks on unwind directives. @code{-munwind-check=warning}
will make the assembler issue a warning when an unwind directive check
assembler issue an error when an unwind directive check fails.
@item -mhint.b=ok
-@item -mhint.b=warning
-@item -mhint.b=error
+@itemx -mhint.b=warning
+@itemx -mhint.b=error
These options control what the assembler will do when the @samp{hint.b}
instruction is used. @code{-mhint.b=ok} will make the assembler accept
@samp{hint.b}. @code{-mint.b=warning} will make the assembler issue a
the assembler treat @samp{hint.b} as an error, which is the default.
@item -x
-@item -xexplicit
+@itemx -xexplicit
These options turn on dependency violation checking.
@item -xauto
@cindex @samp{-m[no-]mac} command line option, M680x0
@cindex @samp{-m[no-]emac} command line option, M680x0
@item -m[no-]68851
-@item -m[no-]68881
-@item -m[no-]div
-@item -m[no-]usp
-@item -m[no-]float
-@item -m[no-]mac
-@item -m[no-]emac
+@itemx -m[no-]68881
+@itemx -m[no-]div
+@itemx -m[no-]usp
+@itemx -m[no-]float
+@itemx -m[no-]mac
+@itemx -m[no-]emac
Enable or disable various architecture specific features. If a chip
or architecture by default supports an option (for instance
Assemble for the CPU32 family of chips.
@item -m5200
-@item -m5202
-@item -m5204
-@item -m5206
-@item -m5206e
-@item -m521x
-@item -m5249
-@item -m528x
-@item -m5307
-@item -m5407
-@item -m547x
-@item -m548x
-@item -mcfv4
-@item -mcfv4e
+@itemx -m5202
+@itemx -m5204
+@itemx -m5206
+@itemx -m5206e
+@itemx -m521x
+@itemx -m5249
+@itemx -m528x
+@itemx -m5307
+@itemx -m5407
+@itemx -m547x
+@itemx -m548x
+@itemx -mcfv4
+@itemx -mcfv4e
Assemble for the ColdFire family of chips.
@item -m68881
@cindex @code{mlist} directive, TIC54X
@cindex @code{mnolist} directive, TIC54X
@item .mlist
-@item .mnolist
+@itemx .mnolist
Control whether to include macro and loop block expansions in the
listing output. Ignored.
be determined upon use.
@item S_GET_TYPE
-@item S_GET_DESC
-@item S_GET_OTHER
+@itemx S_GET_DESC
+@itemx S_GET_OTHER
@cindex S_GET_TYPE
@cindex S_GET_DESC
@cindex S_GET_OTHER
a.out).
@item S_SET_TYPE
-@item S_SET_DESC
-@item S_SET_OTHER
+@itemx S_SET_DESC
+@itemx S_SET_OTHER
@cindex S_SET_TYPE
@cindex S_SET_DESC
@cindex S_SET_OTHER