projects
/
riscv-isa-sim.git
/ commitdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
| commitdiff |
tree
raw
|
patch
| inline |
side by side
(parent:
e83a032
)
Default to 2 GiB of memory
author
Andrew Waterman
<andrew@sifive.com>
Sat, 25 Mar 2017 01:10:41 +0000
(18:10 -0700)
committer
Andrew Waterman
<andrew@sifive.com>
Sat, 25 Mar 2017 01:10:41 +0000
(18:10 -0700)
riscv/sim.cc
patch
|
blob
|
history
diff --git
a/riscv/sim.cc
b/riscv/sim.cc
index e1a85408042284f20dbbdd9d8b273fe0544fdf43..cb1ed7149908cea1240670384b113e730bbf13d6 100644
(file)
--- a/
riscv/sim.cc
+++ b/
riscv/sim.cc
@@
-34,7
+34,7
@@
sim_t::sim_t(const char* isa, size_t nprocs, size_t mem_mb, bool halted,
size_t memsz0 = (size_t)mem_mb << 20;
size_t quantum = 1L << 20;
if (memsz0 == 0)
- memsz0 = (size_t)
((sizeof(size_t) == 8 ? 4096 : 2048) - 256)
<< 20;
+ memsz0 = (size_t)
2048
<< 20;
memsz = memsz0;
while ((mem = (char*)calloc(1, memsz)) == NULL)