re PR target/11229 (pure-1.c fails on powerpc64-linux with -O1)

	PR target/11229
	* cse.c (cse_insn): Set classp using src_const_elt if
	src_eqv_elt is NULL.

From-SVN: r74225

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 1a51101435b2dd394a445bd3c0bef0e813805da0..6c03f952283b92ffc3461253823145f468860fc6 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2003-12-03  Alan Modra  <amodra@bigpond.net.au>
+
+       PR target/11229
+       * cse.c (cse_insn): Set classp using src_const_elt if
+       src_eqv_elt is NULL.
+
 2003-12-03  Richard Earnshaw  <rearnsha@arm.com>
 
        * gcse.c (reg_clear_last_set): New function.

diff --git a/gcc/cse.c b/gcc/cse.c
index faaf187b32c0e3d9128d097aa5f67385c9276b1b..4b0f1eced4cd76bfebbc6b47d390e9eb72b5bcd4 100644 (file)
--- a/gcc/cse.c
+++ b/gcc/cse.c
@@ -5827,6 +5827,16 @@ cse_insn (rtx insn, rtx libcall_insn)
            enum machine_mode mode
              = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
 
+           /* It's possible that we have a source value known to be
+              constant but don't have a REG_EQUAL note on the insn.
+              Lack of a note will mean src_eqv_elt will be NULL.  This
+              can happen where we've generated a SUBREG to access a
+              CONST_INT that is already in a register in a wider mode.
+              Ensure that the source expression is put in the proper
+              constant class.  */
+           if (!classp)
+             classp = sets[i].src_const_elt;
+
            if (sets[i].src_elt == 0)
              {
                /* Don't put a hard register source into the table if this is