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liteusb/frontend/dma: remove +4 to length for CRC (we'll do it in core)
authorFlorent Kermarrec <florent@enjoy-digital.fr>
Thu, 7 May 2015 18:03:55 +0000 (20:03 +0200)
committerFlorent Kermarrec <florent@enjoy-digital.fr>
Fri, 8 May 2015 21:10:08 +0000 (23:10 +0200)
misoclib/com/liteusb/frontend/dma.py patch | blob | history

diff --git a/misoclib/com/liteusb/frontend/dma.py b/misoclib/com/liteusb/frontend/dma.py
index 79f7ab67fb65b0b87b7d0577a6fa9a46c2c5216e..d656eca341005b75628f352134f73861017ec406 100644 (file)
--- a/misoclib/com/liteusb/frontend/dma.py
+++ b/misoclib/com/liteusb/frontend/dma.py
@@ -78,7 +78,7 @@ class LiteUSBDMAReader(Module, AutoCSR):
             source.stb.eq(unpack.source.stb),
             source.sop.eq(cnt == 0),
             source.eop.eq(cnt == (self.dma.length*pack_factor-1)),
-            source.length.eq(self.dma.length*pack_factor+4),
+            source.length.eq(self.dma.length*pack_factor),
             source.data.eq(unpack.source.data),
             source.dst.eq(tag),
             unpack.source.ack.eq(source.ack)