freedreno/a3xx: add logicop

Signed-off-by: Rob Clark <robclark@freedesktop.org>

diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_blend.c b/src/gallium/drivers/freedreno/a3xx/fd3_blend.c
index 395228d4589891a323954be2124e5b03663c0545..71cdc121852414b934a74ee6eb2556bea356eb9f 100644 (file)
--- a/src/gallium/drivers/freedreno/a3xx/fd3_blend.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_blend.c
@@ -39,11 +39,29 @@ fd3_blend_state_create(struct pipe_context *pctx,
                const struct pipe_blend_state *cso)
 {
        struct fd3_blend_stateobj *so;
+       enum a3xx_rop_code rop = ROP_COPY;
+       bool reads_dest = false;
        int i;
 
        if (cso->logicop_enable) {
-               DBG("Unsupported! logicop");
-               return NULL;
+               rop = cso->logicop_func;  /* maps 1:1 */
+
+               switch (cso->logicop_func) {
+               case PIPE_LOGICOP_NOR:
+               case PIPE_LOGICOP_AND_INVERTED:
+               case PIPE_LOGICOP_AND_REVERSE:
+               case PIPE_LOGICOP_INVERT:
+               case PIPE_LOGICOP_XOR:
+               case PIPE_LOGICOP_NAND:
+               case PIPE_LOGICOP_AND:
+               case PIPE_LOGICOP_EQUIV:
+               case PIPE_LOGICOP_NOOP:
+               case PIPE_LOGICOP_OR_INVERTED:
+               case PIPE_LOGICOP_OR_REVERSE:
+               case PIPE_LOGICOP_OR:
+                       reads_dest = true;
+                       break;
+               }
        }
 
        if (cso->independent_blend_enable) {
@@ -70,7 +88,7 @@ fd3_blend_state_create(struct pipe_context *pctx,
                                A3XX_RB_MRT_BLEND_CONTROL_CLAMP_ENABLE;
 
                so->rb_mrt[i].control =
-                               A3XX_RB_MRT_CONTROL_ROP_CODE(12) |
+                               A3XX_RB_MRT_CONTROL_ROP_CODE(rop) |
                                A3XX_RB_MRT_CONTROL_COMPONENT_ENABLE(rt->colormask);
 
                if (rt->blend_enable)
@@ -79,6 +97,9 @@ fd3_blend_state_create(struct pipe_context *pctx,
                                        A3XX_RB_MRT_CONTROL_BLEND |
                                        A3XX_RB_MRT_CONTROL_BLEND2;
 
+               if (reads_dest)
+                       so->rb_mrt[i].control |= A3XX_RB_MRT_CONTROL_READ_DEST_ENABLE;
+
                if (cso->dither)
                        so->rb_mrt[i].control |= A3XX_RB_MRT_CONTROL_DITHER_MODE(DITHER_ALWAYS);
        }

diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_draw.c b/src/gallium/drivers/freedreno/a3xx/fd3_draw.c
index a482aec3decb892e3b7a3454864ba4d5df4c7b05..be710d16013179a4dd9c4eac7095659c594a2a20 100644 (file)
--- a/src/gallium/drivers/freedreno/a3xx/fd3_draw.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_draw.c
@@ -228,7 +228,7 @@ fd3_clear(struct fd_context *ctx, unsigned buffers,
 
        for (i = 0; i < 4; i++) {
                OUT_PKT0(ring, REG_A3XX_RB_MRT_CONTROL(i), 1);
-               OUT_RING(ring, A3XX_RB_MRT_CONTROL_ROP_CODE(12) |
+               OUT_RING(ring, A3XX_RB_MRT_CONTROL_ROP_CODE(ROP_COPY) |
                                A3XX_RB_MRT_CONTROL_DITHER_MODE(DITHER_ALWAYS) |
                                A3XX_RB_MRT_CONTROL_COMPONENT_ENABLE(ce));
 

diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c b/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c
index 0f0cf3104c5a5661f89794e70123e5275c38bcdc..a48454466338bd60c7c8e46eee060aba668caa2b 100644 (file)
--- a/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c
@@ -436,7 +436,7 @@ fd3_emit_tile_mem2gmem(struct fd_context *ctx, struct fd_tile *tile)
 
        for (i = 0; i < 4; i++) {
                OUT_PKT0(ring, REG_A3XX_RB_MRT_CONTROL(i), 1);
-               OUT_RING(ring, A3XX_RB_MRT_CONTROL_ROP_CODE(12) |
+               OUT_RING(ring, A3XX_RB_MRT_CONTROL_ROP_CODE(ROP_COPY) |
                                A3XX_RB_MRT_CONTROL_DITHER_MODE(DITHER_DISABLE) |
                                A3XX_RB_MRT_CONTROL_COMPONENT_ENABLE(0xf));
 
@@ -674,7 +674,7 @@ emit_binning_pass(struct fd_context *ctx)
 
        for (i = 0; i < 4; i++) {
                OUT_PKT0(ring, REG_A3XX_RB_MRT_CONTROL(i), 1);
-               OUT_RING(ring, A3XX_RB_MRT_CONTROL_ROP_CODE(0) |
+               OUT_RING(ring, A3XX_RB_MRT_CONTROL_ROP_CODE(ROP_CLEAR) |
                                A3XX_RB_MRT_CONTROL_DITHER_MODE(DITHER_DISABLE) |
                                A3XX_RB_MRT_CONTROL_COMPONENT_ENABLE(0));
        }