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going to be adding verilator save/restore state
author
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Fri, 21 Jan 2022 13:06:31 +0000
(13:06 +0000)
committer
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Fri, 21 Jan 2022 13:06:31 +0000
(13:06 +0000)
however the simulated-uart will be in some unknown state at the time,
on restore. as a "cheat", only save when the tx and rx state machines
are both in IDLE
verilator/uart-verilator.c
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diff --git
a/verilator/uart-verilator.c
b/verilator/uart-verilator.c
index 8492a117cd718e4285239e827aec87e23be18b8b..0346f6be6761d5d010b542e7d81a6039e9db7c9e 100644
(file)
--- a/
verilator/uart-verilator.c
+++ b/
verilator/uart-verilator.c
@@
-251,3
+251,11
@@
unsigned char uart_rx(void)
return rx;
}
+
+// cheating, here: to avoid having to save the uart state, check if it
+// is idle (both tx and rx)
+bool uart_idle(void)
+{
+ return (tx_state == IDLE && rx_state == IDLE);
+}
+