mips.md ([u]divmodsi4,[u]divmoddi4,[u]divsi3,[u]divdi3, [...]): Don't copy the "zero...
authorGavin Romig-Koch <gavin@cygnus.com>
Thu, 4 Feb 1999 07:51:51 +0000 (07:51 +0000)
committerGavin Romig-Koch <gavin@gcc.gnu.org>
Thu, 4 Feb 1999 07:51:51 +0000 (07:51 +0000)
       * config/mips/mips.md ([u]divmodsi4,[u]divmoddi4,[u]divsi3,[u]divdi3,
[u]modsi3,[u]moddi3) : Don't copy the "zero" argument to a register
        before calling gen_div_trap.

From-SVN: r25019

gcc/ChangeLog
gcc/config/mips/mips.md

index b0d0c5bb0d08057c8c961e2972ee41e2efa841d2..3a222884d01b6cfccda4af826bc393b742c761eb 100644 (file)
@@ -1,3 +1,9 @@
+Thu Feb  4 10:46:30 1999  Gavin Romig-Koch  <gavin@cygnus.com>
+
+       * config/mips/mips.md ([u]divmodsi4,[u]divmoddi4,[u]divsi3,[u]divdi3,
+       [u]modsi3,[u]moddi3) : Don't copy the "zero" argument to a register
+               before calling gen_div_trap.
+
 Wed Feb  3 21:56:27 1999  Jeffrey A Law  (law@cygnus.com)
 
        * configure.in (hppa1.1-*-*, hppa2*-*): Use symbolic value rather
index 40e741975b012e4645b323f0a644b1d0a0d974e3..71bd9a65edf853bf4d83af364625ca4dcddc402a 100644 (file)
   if (!TARGET_NO_CHECK_ZERO_DIV)
     {
       emit_insn (gen_div_trap (operands[2],
-                              copy_to_mode_reg (SImode, GEN_INT (0)),
+                              GEN_INT (0),
                               GEN_INT (0x7)));
     }
   if (TARGET_CHECK_RANGE_DIV)
   if (!TARGET_NO_CHECK_ZERO_DIV)
     {
       emit_insn (gen_div_trap (operands[2],
-                              copy_to_mode_reg (DImode, GEN_INT (0)),
+                              GEN_INT (0),
                               GEN_INT (0x7)));
     }
   if (TARGET_CHECK_RANGE_DIV)
   if (!TARGET_NO_CHECK_ZERO_DIV)
     {
       emit_insn (gen_div_trap (operands[2],
-                              copy_to_mode_reg (SImode, GEN_INT (0)),
+                              GEN_INT (0),
                               GEN_INT (0x7)));
     }
   
   if (!TARGET_NO_CHECK_ZERO_DIV)
     {
       emit_insn (gen_div_trap (operands[2],
-                              copy_to_mode_reg (DImode, GEN_INT (0)),
+                              GEN_INT (0),
                               GEN_INT (0x7)));
     }
   
   if (!TARGET_NO_CHECK_ZERO_DIV)
     {
       emit_insn (gen_div_trap (operands[2],
-                              copy_to_mode_reg (SImode, GEN_INT (0)),
+                              GEN_INT (0),
                               GEN_INT (0x7)));
     }
   if (TARGET_CHECK_RANGE_DIV)
   if (!TARGET_NO_CHECK_ZERO_DIV)
     {
       emit_insn (gen_div_trap (operands[2],
-                              copy_to_mode_reg (DImode, GEN_INT (0)),
+                              GEN_INT (0),
                               GEN_INT (0x7)));
     }
   if (TARGET_CHECK_RANGE_DIV)
   if (!TARGET_NO_CHECK_ZERO_DIV)
     {
       emit_insn (gen_div_trap (operands[2],
-                              copy_to_mode_reg (SImode, GEN_INT (0)),
+                              GEN_INT (0),
                               GEN_INT (0x7)));
     }
   if (TARGET_CHECK_RANGE_DIV)
   if (!TARGET_NO_CHECK_ZERO_DIV)
     {
       emit_insn (gen_div_trap (operands[2],
-                              copy_to_mode_reg (DImode, GEN_INT (0)),
+                              GEN_INT (0),
                               GEN_INT (0x7)));
     }
   if (TARGET_CHECK_RANGE_DIV)
   if (!TARGET_NO_CHECK_ZERO_DIV)
     {
       emit_insn (gen_div_trap (operands[2],
-                              copy_to_mode_reg (SImode, GEN_INT (0)),
+                              GEN_INT (0),
                               GEN_INT (0x7)));
     }
   
   if (!TARGET_NO_CHECK_ZERO_DIV)
     {
       emit_insn (gen_div_trap (operands[2],
-                              copy_to_mode_reg (DImode, GEN_INT (0)),
+                              GEN_INT (0),
                               GEN_INT (0x7)));
     }
   
   if (!TARGET_NO_CHECK_ZERO_DIV)
     {
       emit_insn (gen_div_trap (operands[2],
-                              copy_to_mode_reg (SImode, GEN_INT (0)),
+                              GEN_INT (0),
                               GEN_INT (0x7)));
     }
   
   if (!TARGET_NO_CHECK_ZERO_DIV)
     {
       emit_insn (gen_div_trap (operands[2],
-                              copy_to_mode_reg (DImode, GEN_INT (0)),
+                              GEN_INT (0),
                               GEN_INT (0x7)));
     }